Commit Graph

5810 Commits

Author SHA1 Message Date
150a02117c sayma_rtm: drive clk_src_ext_sel 2019-12-09 19:47:50 +08:00
307a6ca140 gth_ultrascale: make OBUFDS_GTE3 work
https://www.xilinx.com/support/answers/67919.html
2019-12-09 18:13:22 +08:00
4919fb8765 wrpll: print DDMTD helper tags 2019-12-09 17:39:22 +08:00
0d4eccc1a5 wrpll: improve debug output 2019-12-09 17:23:09 +08:00
f633c62e8d wrpll: speed up si549 i2c access 2019-12-09 17:22:58 +08:00
14e09582b6 wrpll: work around si549 not working when lsdiv=2 2019-12-09 16:20:08 +08:00
439576f59d wrpll: fix Si549 initialization delays 2019-12-09 16:13:57 +08:00
2b5213b013 wrpll: constrain clocks 2019-12-09 12:26:44 +08:00
05e2e1899a wrpll: update OBUFDS_GTE2 comment
Seems O can fan out simultaneously to transceiver and fabric.
Kasli is using ODIV2 for no particular reason.
2019-12-09 11:58:54 +08:00
4148efd2ee wrpll: implement filters and connect to Si549 2019-12-09 11:47:29 +08:00
d43fe644f0 wrpll: stabilize DDMTDSamplerGTP 2019-12-09 11:47:14 +08:00
0499f83580 wrpll: helper clock sanity check 2019-12-08 23:46:33 +08:00
46a776d06e sayma: introduce WRPLL on RTM 2019-12-08 15:30:00 +08:00
f35f658bc5 artiq_flash: rework RTM management 2019-12-08 15:29:31 +08:00
bcd061f141 artiq_flash: RTM is a regular DRTIO satellite, can be used with all variants 2019-12-08 15:12:04 +08:00
883310d83e sayma_rtm: si5324 -> cdrclkc 2019-12-08 14:26:05 +08:00
57a5bea43a sayma_rtm: support setting RTIO frequency 2019-12-08 11:45:31 +08:00
da9237de53 wrpll: support differential DDMTD inputs 2019-12-07 18:18:57 +08:00
Paweł Kulik
3851a02a3a Added option of flashing only RTM gateware.
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2019-12-07 09:31:19 +08:00
Paweł Kulik
14e250c78f Enabled internal pullup for CML SYSREF outputs, otherwise there is no signal on them.
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2019-12-07 09:30:24 +08:00
7098854b0f wrpll: share DDMTD counter 2019-12-04 19:05:56 +08:00
05c5fed07d suservo: stray comma 2019-12-03 08:38:07 +00:00
56074cfffa suservo: support operating with one urukul
implemented by wiring up the second Urukul to dummy pins

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-12-02 11:30:20 +01:00
86e1924493 kasli_generic: support external reference on masters 2019-11-30 07:34:41 +00:00
eb271f383b wrpll: add DDMTD cores 2019-11-28 22:03:50 +08:00
39d5ca11f4 si549: increase I2C frequency 2019-11-28 22:03:26 +08:00
87894102e5 si549: use recommended i2c read sequence 2019-11-28 17:49:02 +08:00
2e55e39ac7 wrpll: use spaces to indent 2019-11-28 17:40:25 +08:00
354d82cfe3 wrpll: drive helper clock domain 2019-11-28 17:40:00 +08:00
4a03ca928d artiq_flash: sayma fixes 2019-11-28 17:38:29 +08:00
68cab5be8c si549: cleanups 2019-11-28 16:36:59 +08:00
bcd2383c9d wrpll: si549 initialization 2019-11-27 22:58:08 +08:00
4832bfb08c wrpll: i2c functions, select_recovered_clock placeholder 2019-11-27 21:21:00 +08:00
449d2c4f08 libboard_misoc: fix !has_i2c 2019-11-27 21:04:28 +08:00
e0687b77f5 si5324: 10 MHz ext_ref_frequency
* close #1254
* tested on innsbruck2 kasli variant
* sponsored by Uni Innsbruck/AQT

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-11-22 18:29:12 +01:00
c536f6c4df sayma_amc: output ddmtd_rec_clk 2019-11-20 19:16:04 +08:00
ae50da09c4 drtio/gth_ultrascale: support OBUFDS_GTE3 2019-11-20 19:15:50 +08:00
fe0c324b38 sayma: integrate si549 core 2019-11-20 17:37:16 +08:00
fa41c946ea wrpll: si549 fixes 2019-11-20 17:04:24 +08:00
c5dbab1929 gateware: move wrpll to drtio 2019-11-20 14:43:08 +08:00
gthickman
56d4b70e01 ad9910 osk (#1387)
* updated adoo10.py for RAM mode frequency control

* updated docstrings for set_cfr1() in ad9910.py

* fixed typo in ad9910.py

* added docstrings to ad9910.py

* removed OSK-related changes in AD9910, to be included in a separate branch.

* updated AD9910 set_cfr1 for control of OSK mode parameters

* updated AD9910 set_cfr1() for control of OSK mode parameters.
2019-11-18 15:57:26 +01:00
Fabian Schmid
f73e2a3d30 doc: clarify urukul attenuator behavior
Closes #1386

Signed-off-by: Fabian Schmid <fabian.schmid@mpq.mpg.de>
2019-11-18 15:56:00 +01:00
3adc799785 update GUI background 2019-11-15 13:49:09 +08:00
db13747279 fix device_db alias corner case bugs. Closes #1140 2019-11-14 16:22:45 +08:00
4707aef45c split out artiq-comtools 2019-11-14 15:21:51 +08:00
4416378d21 frontend: add --version to common tools 2019-11-14 11:42:31 +08:00
Garrett
f8a7e278b8 removed OSK-related changes in AD9910, to be included in a separate branch. 2019-11-12 19:07:05 +01:00
Garrett
3a19ba7e62 added docstrings to ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
4ad3651022 fixed typo in ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
6d34eb3bb0 updated docstrings for set_cfr1() in ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
61ca46ec3f updated adoo10.py for RAM mode frequency control 2019-11-12 19:07:05 +01:00
fd7081830c remove fire_and_forget (moved to sipyco) 2019-11-12 19:43:04 +08:00
3fd6962bd2 use sipyco (#585) 2019-11-10 15:55:17 +08:00
6644903843 bootloader: fix imports 2019-11-06 14:45:55 +08:00
5279bc275a urukul: rework EEPROM synchronization. Closes #1372 2019-11-05 18:56:10 +08:00
David Nadlinger
bc3b55b1a8 gateware/eem: Force IOB=TRUE on Urukul SYNC output
Without this, the final register in the SYNC signal TTLClockGen
isn't (always) placed in the I/O tile, leading to more jitter
than necessary, and causing "double window" artefacts. See
sinara-hw/Urukul#16 for more details.

(Patch based on work by Weida Zhang, testing by various members
of the community in Oxford and elsewhere.)
2019-11-05 17:14:07 +08:00
b25a17fa37 netboot: support slave FPGA loading 2019-11-05 16:28:49 +08:00
307f39e900 remoting: fix multiuser access. Closes #1383 2019-11-05 15:46:07 +08:00
9dc82bd766 bootloader: add no_flash_boot config option to force network boot 2019-11-05 15:31:08 +08:00
e2f9f59472 artiq_flash: fix flashing Sayma RTM from package 2019-11-05 15:19:01 +08:00
98854473dd sayma_amc: use all transceivers on master (#1230) 2019-11-02 12:12:32 +08:00
29b4d87943 firmware: add cargosha256.nix 2019-11-01 10:28:41 +08:00
5362f92b39 bootloader: disable minimum stack space check in linker script
* The value varies greatly whether netboot is enabled or not.
* There is no simple solution to detect has_ethmac in the linker script and set the value accordingly.
* The space check is an imperfect solution that will be superseded by stack pointer limits.
* Left commented out so we can re-enable it manually during development if stack corruption is suspected.
2019-11-01 10:25:14 +08:00
deadfead2a bootloader: fix !has_ethmac 2019-11-01 10:19:08 +08:00
42af76326f kasli: enlarge integrated CPU SRAM for DRTIO masters
Required by the bootloader netboot support.
2019-11-01 10:15:13 +08:00
a78e493b72 firmware: load slave FPGA in bootloader 2019-10-31 12:42:40 +08:00
389a8f587a slave_fpga: modularize 2019-10-31 11:50:53 +08:00
9a35a2ed81 test_frontends: update 2019-10-30 22:02:16 +08:00
bc050fdeec bootloader: treat zero-length firmware in flash as no firmware 2019-10-30 21:46:06 +08:00
228e44a059 sayma: enable Ethernet on DRTIO satellite variant
So that netboot can be used in bootloader.
2019-10-30 21:39:00 +08:00
dc71039934 sayma, metlino: increase integrated_sram_size on Ethernet-enabled variants 2019-10-30 21:36:00 +08:00
3042476230 artiq_netboot: remove unnecessary import 2019-10-30 21:29:33 +08:00
c96de7454d remove artiq_devtool 2019-10-30 21:27:24 +08:00
88dbff46f4 add netboot tool 2019-10-30 21:24:51 +08:00
462cf5967e bootloader: add netboot support 2019-10-30 21:23:42 +08:00
1f15e55021 comm_analyzer: don't assume every message has data
close #1377
2019-10-28 15:35:44 +01:00
David Nadlinger
611bcc4db4 compiler: Cache expensive target data layout queries
On one typical experiment, this shaves about 3 seconds (~25%)
off the overall kernel compilation time.

GitHub: Closes #1370.
2019-10-28 11:09:25 +00:00
David Nadlinger
5d7f22ffa4 compiler: Remove provision for unused four-parameter llptr_to_var() form [nfc]
`var_type` was presumably intended to convert to a target type,
but wasn't actually acted on in the function body (nor was it
used anywhere in the codebase).
2019-10-28 11:02:46 +00:00
f2f7170d20 hmc7043: use recommend I/O standards
https://github.com/sinara-hw/Sayma_RTM/issues/116#issuecomment-544187952
2019-10-21 22:56:10 +08:00
47a83c71f1 firmware: more readable network addresses message 2019-10-21 14:00:14 +08:00
818d6b2f5a bootloader: fix compilation problems 2019-10-21 13:28:17 +08:00
8f76a3218e firmware: move i2c to libboard_misoc, enable IPv6 in bootloader, share network settings 2019-10-21 12:58:52 +08:00
1c5e749036 satman: remove compilation warning without JESD DACs 2019-10-21 12:53:54 +08:00
d26d80410e runtime: refactor network settings 2019-10-19 17:56:35 +08:00
6d5dcb4211 runtime: enable IPv6. Closes #349 2019-10-19 17:20:33 +08:00
05e8f24c24 sayma2: JESD204 synchronization 2019-10-18 23:28:47 +08:00
62b49882b9 examples/kc705: fix dds_test 2019-10-17 07:37:00 +08:00
a8f85860c4 coreanalyzer: AD9914 fixes (#1376) 2019-10-17 07:29:33 +08:00
d42ff81144 examples/sayma_master: update device_db 2019-10-16 18:49:25 +08:00
8fa3c6460e sayma_amc: set direction of external TTL buffer according to RTIO PHY OE 2019-10-16 18:48:50 +08:00
37d0a5dc19 rtio/ttl: expose OE 2019-10-16 18:48:20 +08:00
bc060b7f01 style 2019-10-16 18:18:11 +08:00
40d64fc782 sayma: remove standalone examples (no longer supported) 2019-10-16 17:54:39 +08:00
21a1c6de3f sayma: use SFP0 for DRTIO master 2019-10-16 17:53:40 +08:00
6cf06fba7b examples: use default IP addresses for boards 2019-10-16 16:18:30 +08:00
314d9b5d06 kasli: default to 125MHz frequency for DRTIO
This is the consistent and most common option. Sayma will also eventually move to it.
2019-10-08 12:59:52 +08:00
4df2c5d1fb sayma: prepare for SYSREF align
We will try DDMTD on the AMC first, as this is simpler and perhaps will work on v2 after the power supply fixes.
2019-10-08 12:30:47 +08:00
5ee81dc643 satman: define constants for JdacBasicRequest reqnos 2019-10-08 10:27:04 +08:00
4b3baf4825 firmware: run PRBS and STPL JESD204 tests 2019-10-08 00:10:36 +08:00
03007b896e sayma_amc: sma -> mcx 2019-10-07 20:31:35 +08:00
ebd5d890f1 satman: check for JESD ready 2019-10-06 23:10:57 +08:00
90e3b83e80 hmc7043: turn on AMC_FPGA_SYSREF1
Florent's JESD core won't work at all without.
2019-10-06 22:49:00 +08:00
97a0dee3e8 jesd204: remove ibuf_disable
We use the MOSFET to mute the HMC7043 noise on hardware v2 instead.
2019-10-06 22:26:31 +08:00
1bc7743e03 sayma: fix hmc7043 output settings for v2 hardware 2019-10-06 21:50:29 +08:00
a421820a32 sayma: initialize DACs over DRTIO 2019-10-06 21:42:45 +08:00
f8e4cc37d0 sayma_rtm: reset and detect DACs 2019-10-06 20:15:27 +08:00
f62dc7e1d4 sayma: refactor JESD DAC channel groups 2019-10-06 20:15:09 +08:00
c4c884b8ce ad9154: simplify, focus on AD9154 config and do not include JESD 2019-10-06 20:07:02 +08:00
fdba0bfbbc satman: move now-unrelated hmc830_7043 init away from DRTIO transceiver init 2019-10-06 19:22:46 +08:00
1c6c22fde9 sayma_amc: HMC830_REF moved to RTM side 2019-10-06 18:15:37 +08:00
ad63908aff hmc830_7043: enable_fpga_ibuf -> unmute 2019-10-06 18:13:59 +08:00
5ad65b9d30 hmc830_7043: remove clock_mux 2019-10-06 18:13:27 +08:00
e6ff44301b sayma_amc: cleanup (v2.0 only) 2019-10-06 18:11:43 +08:00
e9b81f6e33 remove serwb
DRTIO is a better solution
2019-10-06 18:10:23 +08:00
7cd02d30b7 sayma_rtm_drtio: replace sayma_rtm 2019-10-06 17:59:53 +08:00
b3b85135a3 sayma_rtm_drtio: add DDMTD core, move specific cores out of SatelliteBase 2019-10-06 17:59:11 +08:00
346c985347 sayma_rtm_drtio: use artiq_sayma folder 2019-10-06 17:30:08 +08:00
e2a924449d artiq_flash: use DRTIO RTM gateware 2019-10-06 17:28:14 +08:00
4198033657 sayma_rtm_drtio: cleanup (v2.0 only) 2019-10-06 16:42:34 +08:00
5612b31860 sayma_rtm_drtio: add HMC clock chip and DAC control 2019-10-06 16:15:24 +08:00
a8cf4c2b18 sayma_rtm: hwrev v2.0 by default 2019-10-06 13:25:30 +08:00
1bc5d44a7c artiq_flash: do not flash RTM gateware on Sayma variants that don't need it 2019-10-06 13:15:50 +08:00
bb5ff46f7d Merge branch 'wrpll' 2019-10-05 10:24:11 +08:00
7b95814cf5 sayma_amc: refactor, add SimpleSatellite variant 2019-10-05 10:24:06 +08:00
58b7bdcecc sayma_amc: refactor RTM FPGA code 2019-10-05 10:24:06 +08:00
96fc4a21e8 sayma_amc: remove dummy FPGA pin assignment testing code 2019-10-05 10:24:06 +08:00
Tim Ballance
ada3b39f4e Fix ad9910 ram mode asf scale error in polar mode 2019-10-04 20:14:41 +02:00
Tim Ballance
448080e71d Fix ad9910 ram mode asf scale error
RAM mode amplitude to ASF conversion should be << 18 rather than << 16
2019-10-04 20:14:41 +02:00
6aa68e1715 sayma_rtm2: select filtered clock from Si5324 2019-10-04 22:56:16 +08:00
6cb0f5de59 sayma_amc: enable DRTIO switching 2019-10-04 22:55:23 +08:00
0cf8a46bbd sayma_amc2: select filtered clock from Si5324 2019-10-04 21:28:26 +08:00
6f533727cb artiq_flash: use regular bscan_spi_xcku040 for Sayma
The modified version is no longer necessary on v2 boards, and breaks flash bank 1.
2019-10-04 17:50:45 +08:00
4c1fe1de0d environment: implement HasEnvironment.call_child_method (#1366) 2019-09-30 23:58:36 +08:00
Charles Baynham
0b1fb255a9 tools: Wrap Task _do() calls in a generic exception handler
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2019-09-20 23:00:59 +08:00
Charles Baynham
e50a6d5aaf worker_impy: ignore newline at start of experiment docstring 2019-09-20 22:10:49 +08:00
f0e87d2e59 grabber: remove unused code 2019-09-20 15:26:12 +02:00
4e77be0511 firmware: add Cargo.lock header that newer cargo wants 2019-09-17 15:22:14 +08:00
Charles Baynham
b7abf2fb53 pyon: Handle inf in decoding 2019-09-12 09:46:05 +08:00
38fca01189 artiq_ddb_template: add su-servo support (#1343) 2019-09-11 15:52:25 +08:00
991c686d72 kasli_generic,eem: print RTIO channels in hex like artiq_ddb_template 2019-09-11 15:51:53 +08:00
f4dd7e5e29 kasli_tester: init urukul channel before calibrating
Otherwise the DDS is not initialized and with a cold system it fails to
find IO_UPDATE edges.

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-09-11 07:16:35 +00:00
7492a59f6d kasli_generic: add SUServo support (#1343) 2019-09-11 11:12:48 +08:00
David Nadlinger
6d6f66338b runtime: Update core config panic_reset command suggestion message 2019-09-10 19:31:19 +01:00
Charles Baynham
ddd34e5a9c influx_schedule: log repo_rev along with other info
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2019-09-10 13:46:28 +02:00
98caaebade consistent use of 'class name' terminology to select a class within an experiment file. Closes #1348 2019-09-09 15:16:33 +08:00
21021beb08 kasli: remove opticlock (moved to kasli_generic) 2019-09-09 15:03:10 +08:00
436662be52 ddb_template: add Novogorny support 2019-09-09 15:00:45 +08:00
69c2acd9d7 ddb_template: sampler cnv is ttl not spi 2019-09-09 14:57:42 +08:00
cfb5ef5548 kasli_generic: add Novogorny support 2019-09-09 14:54:34 +08:00
0b9168994f Revert "dashboard: Sort TTL moninj channels by name"
This reverts commit b3db3ea6fc.

Closes #1288
2019-09-06 11:17:10 +08:00
Charles Baynham
d31f30a436 influxdb_schedule: fix typo in parameter name 2019-09-05 17:42:56 +02:00
Charles Baynham
7ac8feea19 influxdb_schedule: Handle all exceptions 2019-09-05 17:42:56 +02:00
1fb317778a eem/grabber: allow third EEM to be specified 2019-08-29 18:58:12 +08:00
90e8e074cd firmware: turn errors into &str for remote_i2c as well
should resolve breakage on a few targets/variants introduced by PR #1351
2019-08-29 09:05:47 +08:00
71b3c66af9 firmware: conditionally compile has_si5324
avoids unused warnings where this module is not used.
2019-08-29 09:04:54 +08:00
959679d8b7 wrpll: add I2CMasterMachine 2019-08-27 18:02:05 +08:00
c03c35f375 Revert "compiler: armv7-unknown-linux-gnueabihf -> armv7-linux-gnueabihf"
rustc insists on -unknown.

This reverts commit cf47fa44d8.
2019-08-26 11:23:00 +08:00
cf47fa44d8 compiler: armv7-unknown-linux-gnueabihf -> armv7-linux-gnueabihf 2019-08-26 11:12:49 +08:00
98cd9a539c compiler: support Cortex A9 target 2019-08-26 10:46:22 +08:00
afe162ceca firmware: don't unwrap() but propagate pca9548 errors 2019-08-17 09:15:26 +08:00
a8aabd3815 firwmare: turn i2c errors into &str 2019-08-17 09:15:26 +08:00
8fc5ce902f firmware: let kasli obtain default hardware_addr from i2c_eeprom 2019-08-17 09:15:26 +08:00
d666f3d573 firmware: factor out mod pca9548 from si5324
orepares for further i2c devices.
2019-08-17 09:15:26 +08:00
1fd2322662 wrpll/thls: implement global writeback 2019-08-15 23:16:17 +08:00
24082b687e wrpll/filters: clean up and make compatible with thls 2019-08-15 17:58:22 +08:00
9331fafab0 wrpll/filters: new code from Weida 2019-08-15 17:24:40 +08:00
5c3974c265 wrpll/thls: fix opcode decoding 2019-08-15 17:12:48 +08:00
19620948bf wrpll/thls: implement signed numbers 2019-08-15 17:04:17 +08:00
efc43142a6 wrpll/thls: implement min/max 2019-08-15 16:42:59 +08:00
44969b03ad wrpll/thls: rework instruction decoding 2019-08-15 15:55:13 +08:00
2776c5b16b wrpll/thls: support mulshift 2019-08-15 15:07:13 +08:00
e9b78b62db kasli_tester/zotino: always alternate voltage sign
Before the voltages on a second Zotino would start 2.1, 1.9, 2.2, 1.8
..., 3.6, 0.4 and overlap with the voltages on the first.
Now the voltages are 2.1, -2.1, 2.2, -2.2, ..., 3.6, -3.6 which allows
quick identification of card/channel and easy prediction when deploying.
2019-08-06 17:38:55 +02:00
f861459ace wrpll: add filter algorithms (WIP) 2019-08-02 13:23:16 +08:00
David Nadlinger
99e490f9ff coredevice/suservo: Slightly reword get_adc[_mu]() docstring for clarity
This hopefully suggests a bit better that the value is the last one
fetched by the servo (i.e. needs the servo active to update), rather
than somehow requesting a new sample to be taken.
2019-07-30 12:22:08 +01:00
3f0657f2a8 artiq_influxdb_schedule: add schedule logger
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-07-26 14:47:18 +02:00
7a5dcbe60e wrpll/thls: support processor start/stop 2019-07-24 18:51:33 +08:00
b8870997d0 doc: clarify TTL direction control with buffered cards 2019-07-24 10:04:45 +08:00
623446f82c wrpll/thls: simple simulation demo 2019-07-20 18:50:57 +08:00
831b3514d3 wrpll/thls: stop at return statement 2019-07-19 16:27:29 +08:00
David Nadlinger
280915d54f coredevice/suservo: Adjust T_CYCLE to match gateware
See GitHub #1338.
2019-07-17 00:20:22 +01:00
34222b3f38 wrpll: encode thls program 2019-07-09 17:56:14 +08:00
5f461d08cd wrpll: add simple thls compiler 2019-07-09 16:07:31 +08:00
f7e10759dc suservo: note requirement to stop servo when accessing state
As already mentioned in the gateware.

One alternative would be to detect address collisions and
stall the read for one cycle.

Note that there will in general not be a consistent view of the servo
state unless the servo is stopped.

close #1337
2019-07-08 18:37:42 +02:00
e4fff390a8 si590 -> si549
Had mistaken the part numbers.
2019-07-07 09:39:55 +08:00
dceb5ae501 wrpll: Si590 I2C mux, CDC 2019-07-05 23:42:37 +08:00
f8dba7ae35 rtio: use BlindTransfer from Migen 2019-07-05 18:46:18 +08:00
5a9bb0ecba runtime: fix incorrect 'RTIO clock failed' report 2019-06-24 23:33:13 +08:00
David Nadlinger
8bf9640185 coredevice/suservo: Fix output IIR state width in docstring 2019-06-21 11:27:39 +02:00
David Nadlinger
34f48f57cc coredevice/suservo: Fix {get,set}_y_mu() scaling
Previously, Channel.set_y(1) would set the output to -1 instead.
2019-06-21 11:27:39 +02:00
f6edceb23d kasli_tester: cleanup/fix test skipping 2019-06-21 16:00:14 +08:00
whitequark
b8b9fa51bd libdyld: accept objects with no rela relocations. 2019-06-17 06:43:34 +00:00
David Nadlinger
0353966ef7 gateware/suservo: Sign-extend data on RTIO read-back
See GitHub #1327 for original patch by Brad Bondurant.
2019-06-14 23:46:16 +01:00
David Nadlinger
720838a23e gateware/suservo: Avoid magic number for activation delay width
Mostly for documentation purposes; 8 bits ought to be enough for
everyone.
2019-06-14 23:45:40 +01:00
53789ba9aa tester: handle urukul switch differences 2019-06-14 10:54:00 +00:00
6655e567df ddb_template: urukul fixes
* fix/add sw (ad9912 and ad9910)
* allow pll_n to be changed
2019-06-14 10:53:03 +00:00
53c778ae2d runtime: fix previous commit 2019-06-14 15:53:01 +08:00
a947867887 runtime: support Kasli Si5324 bypass via rtio_clock=e 2019-06-14 15:48:05 +08:00
66a66b03b4 style 2019-06-14 15:29:16 +08:00
87ce24e867 runtime: refactor startup and RTIO clocking initialization 2019-06-14 15:26:30 +08:00
43e58c939c sayma: drop MasterDAC
This seemed like a good idea then, but it introduces complexity, corner cases, and additional testing difficulties.

Now Sayma works fine with Kasli as a master, which is simpler.
2019-06-14 14:06:16 +08:00