Commit Graph

329 Commits

Author SHA1 Message Date
3a332c5c1d Add ADDIW instruction 2020-08-27 13:11:23 +08:00
dae95900b6 Update README.md 2020-08-27 12:54:28 +08:00
0954ee7fa9 Add SD instruction 2020-08-27 12:53:07 +08:00
472e0a70f8 Update README.md 2020-08-27 12:30:57 +08:00
94da2671dc Add LD instruction 2020-08-27 12:28:19 +08:00
bd76a47a52 Add LWU instruction 2020-08-27 12:25:19 +08:00
92e34efe0d Add RV64I I-Type Instruction (Load Variation) 2020-08-27 12:20:17 +08:00
0af1f20423 Add RV64I I-Type Instruction 2020-08-27 11:46:04 +08:00
fe835e272d Replace RV32I with RV32M for Minerva verification tasks 2020-08-27 10:48:35 +08:00
1ea25a4886 Add RV32M Standard Extension 2020-08-27 10:32:49 +08:00
3f3ec597a1 Update README.md 2020-08-26 17:21:27 +08:00
46e6ca3f70 Add REMU instruction 2020-08-26 17:15:27 +08:00
fb91df7bb8 Add REM instruction 2020-08-26 17:11:03 +08:00
33ace9147a Add DIVU instruction 2020-08-26 17:03:49 +08:00
0708f6b962 Add DIV instruction 2020-08-26 16:58:50 +08:00
b74a0cf699 Add MULHU instruction 2020-08-26 16:43:21 +08:00
a58842ea94 Add MULHSU instruction 2020-08-26 16:39:17 +08:00
15580a74c6 Add MULH instruction 2020-08-26 16:30:54 +08:00
585965ee0a Add MUL instruction 2020-08-26 15:57:32 +08:00
dd17606902 Add RV32M R-Type Instruction 2020-08-26 15:48:55 +08:00
3030839c42 Update README.md 2020-08-25 13:38:31 +08:00
d1d93a6b6a Update README.md 2020-08-25 13:17:16 +08:00
83e65e50c5 Fix broken README 2020-08-25 12:43:13 +08:00
ca9e9c9ca6 Add prototype for instruction/data bus implementation 2020-08-25 12:41:30 +08:00
ac7991ae86 Merge instruction and data bus abstractions 2020-08-25 10:12:02 +08:00
ca135d024f Wire instruction and data buses (WIP) to Minerva core 2020-08-24 14:46:52 +08:00
2a4f6dd07e Wire interrupt signals to Minerva for verification 2020-08-24 13:28:33 +08:00
ee80bff3db Merge riscv_formal_parameters.py into verify.py 2020-08-24 10:20:30 +08:00
607d82f27c Add "Known Issues" section to README 2020-08-21 16:58:33 +08:00
dad6022572 Replace individual instruction checks with ISA check 2020-08-21 15:14:42 +08:00
908ecf9e7e Add uniqueness check 2020-08-21 13:25:52 +08:00
a7b6b7a169 Add liveness check 2020-08-21 12:54:53 +08:00
63fbc10b11 Update README.md 2020-08-21 11:53:20 +08:00
9e530bc729 Merge pull request 'Apply more PEP 8 guidelines, remove hacks and reduce code duplication' (#3) from refactoring into master 2020-08-21 11:48:13 +08:00
c6b9bb9a04 Update README.md 2020-08-21 11:46:39 +08:00
d7d4f8b0ad Reduce code duplication in Minerva verification script 2020-08-21 11:43:20 +08:00
de3ff25da1 Refactor insns directory 2020-08-21 10:33:02 +08:00
3e527b3727 Refactor instructions to use NamedTuple 2020-08-20 17:28:09 +08:00
1a38b37473 Remove copy of Minerva 2020-08-20 15:32:10 +08:00
b9e4279ffe Replace nMigen copy with shell.nix config file 2020-08-20 12:52:06 +08:00
a6b4891a38 Add causal checks 2020-08-20 12:00:31 +08:00
2a9ddf0868 Add register checks 2020-08-20 11:10:33 +08:00
2383706012 Add PC backward checks 2020-08-19 17:22:03 +08:00
2bfd909b49 Add PC forward checks 2020-08-19 17:00:11 +08:00
f7ddbf8cd8 Fix broken markdown in README.md 2020-08-19 14:58:00 +08:00
c073411bd2 Add tests for all RV32I instructions 2020-08-19 14:56:26 +08:00
0e0d4b6e42 Add (currently failing) test case for LUI instruction 2020-08-18 14:10:47 +08:00
3faa8ed1b8 Add build instructions for Minerva 2020-08-17 16:46:15 +08:00
7005d22e4e Add instruction check 2020-08-17 16:03:20 +08:00
d749b297cf Update README.md 2020-08-17 12:05:39 +08:00