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Donald Sebastian Leung 2020-08-21 11:46:39 +08:00
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@ -4,14 +4,14 @@ A port of [riscv-formal](https://github.com/SymbioticEDA/riscv-formal) to nMigen
## Breakdown
| Directory | Description |
| File/Directory | Description |
| --- | --- |
| `shell.nix` | [nix-shell](https://nixos.wiki/wiki/Development_environment_with_nix-shell) configuration file |
| `rvfi` | RISC-V Formal Verification Framework (nMigen port) |
| `rvfi/insns` | Supported RISC-V instructions and ISAs |
| `rvfi/checks` | Checks for RISC-V compliant cores |
| `rvfi/cores` | Cores currently tested against this port of riscv-formal |
| `rvfi/cores/minerva` | Tests for the Minerva core |
| `rvfi/cores/minerva/verify.py` | Verification tasks for the Minerva core |
## Running the Verification