whitequark
5e8888d5f3
Fully drop AD9858 and kc705-nist_qc1 support ( closes #576 ).
2016-11-21 15:14:17 +00:00
Robert Jördens
97a54046e8
rtio: auto clear output event data and address
...
This is to support channels where variable length
event data is well-defined through zero-padding.
E.g. in the case of `Spline` zero-padding of events naturally
corresponds to low-order knots.
Use timestamp change as trigger. This assumes that writes to the
timestamp register always precede address and data writes.
It does not break support for ganged writes of the same event
timestamp and data/address to multiple channels or
channel-addresses.
2016-11-19 16:12:27 +01:00
Robert Jördens
bcde26f990
Revert "phaser: cap phy data width to 64 temporarily"
...
This reverts commit 342b9e977e
.
2016-11-18 17:08:44 +01:00
Robert Jördens
342b9e977e
phaser: cap phy data width to 64 temporarily
2016-11-18 15:46:59 +01:00
Robert Jördens
d678bb3fb6
phaser: update sawg tests
2016-11-18 15:23:56 +01:00
Robert Jördens
b9ce2bb1f0
Merge branch 'phaser' into phaser2
...
* phaser: (127 commits)
phaser: use misoc cordic
phaser: fix DDS dummy cfg
runtime: disable the Nagle algorithm entirely.
runtime: buffer RPC send packets.
runtime: don't print debug messages to the UART.
runtime: print microsecond timestamps in debug messages.
artiq_devtool: abort if build failed.
conda: bump llvmlite-artiq dep.
conda: bump llvmlite-artiq dep.
llvm_ir_generator: use !{→unconditionally.}invariant.load metadata.
artiq_devtool: more robust port forwarding.
setup: remove paramiko dependency (optional and developer-only)
artiq_devtool: implement.
artiq_compile: actually disable attribute writeback.
conda: use pythonparser 1.0.
conda: tighten pythonparser dependency (fixes #600 ).
doc: clarify kernel_invariant doc (fixes #609 ).
compiler: Emit all-kernel_invariant objects as LLVM constants
conda: update for LLVM 3.9.
add has_dds, use config flags
...
2016-11-13 17:30:37 +01:00
Robert Jördens
aedb6747f2
Merge branch 'master' into phaser
...
* master: (47 commits)
runtime: disable the Nagle algorithm entirely.
runtime: buffer RPC send packets.
runtime: don't print debug messages to the UART.
runtime: print microsecond timestamps in debug messages.
artiq_devtool: abort if build failed.
conda: bump llvmlite-artiq dep.
conda: bump llvmlite-artiq dep.
llvm_ir_generator: use !{→unconditionally.}invariant.load metadata.
artiq_devtool: more robust port forwarding.
setup: remove paramiko dependency (optional and developer-only)
artiq_devtool: implement.
artiq_compile: actually disable attribute writeback.
conda: use pythonparser 1.0.
conda: tighten pythonparser dependency (fixes #600 ).
doc: clarify kernel_invariant doc (fixes #609 ).
compiler: Emit all-kernel_invariant objects as LLVM constants
conda: update for LLVM 3.9.
add has_dds, use config flags
Revert "Revert "Revert "Revert "Update for LLVM 3.9.""""
Revert "Revert "Revert "Update for LLVM 3.9."""
...
2016-11-13 16:54:28 +01:00
Sebastien Bourdeauducq
0c1a76d668
unify rtio/drtio kernel interface
2016-11-01 00:30:16 +08:00
Sebastien Bourdeauducq
9aa94e1a2d
adapt to migen/misoc changes
2016-10-31 00:53:01 +08:00
Sebastien Bourdeauducq
ed4d57c638
use new Migen signal attribute API
2016-10-29 21:19:58 +08:00
Robert Jördens
ea0c304a0c
phaser2: wip
2016-10-27 01:00:42 +02:00
Sebastien Bourdeauducq
449d1c4dc6
rtio: export CDC modules
2016-10-22 13:03:10 +08:00
Robert Jördens
f5f7acc1f8
ttl_simple: add pure Input
...
(no Tristate for internal signals)
2016-10-10 17:13:23 +02:00
Robert Jördens
4a0eaf0f95
phaser: add jesd204b rtio dds
...
gateware: add jesd204b awg
gateware: copy phaser (df3825a)
dsp/tools: update satadd mixin
phaser: no DDS stubs
dsp: accu fix
phaser: cleanup/reduce
sawg: kernel support and docs
sawg: coredevice api fixes
sawg: example ddb/experiment
phaser: add conda package
examples/phaser: typo
sawg: adapt tests, fix accu stb
sawg: tweak dds parameters
sawg: move/adapt/extend tests
sawg: test phy, refactor
phaser: non-rtio spi
phaser: target cli update
phaser: ad9154-fmc-ebz pins
phaser: reorganize fmc signal naming
phaser: add test mode stubs
phaser: txen is LVTTL
phaser: clk spi xfer test
phaser: spi for ad9154 and ad9516
phaser: spi tweaks
ad9154: add register map from ad9144.xml
ad9516: add register map from ad9517.xml and manual adaptation
ad9154_reg: just generate getter/setter macros as well
ad9154: reg WIP
ad9154: check and fix registers
kc705: single ended rtio_external_clk
use single ended user_sma_clk_n instead of p/n to free up one clock sma
kc705: mirror clk200 at user_sma_clock_p
ad9516_regs.h: fix B_COUNTER_MSB
phase: wire up clocking differently
needs patched misoc
kc705: feed rtio_external_clock directly
kc705: remove rtio_external_clk for phaser
phaser: spi tweaks
ad9516: some startup
ad9516_reg fixes
phaser: setup ad9516 for supposed 500 MHz operation
ad9516: use full duplex spi
ad9154_reg: add CONFIG_REG_2
ad9154_reg: fixes
phaser: write some ad9154 config
ad9154_reg: fixes
ad9154: more init, and human readable setup
ad9154/ad9516: merge spi support
ad9154: status readout
Revert "kc705: remove rtio_external_clk for phaser"
This reverts commit d500288bb44f2bf2eeb0c2f237aa207b0a8b1366.
Revert "kc705: feed rtio_external_clock directly"
This reverts commit 8dc7825519e3e75b7d3d29c9abf10fc6e3a8b4c5.
Revert "phase: wire up clocking differently"
This reverts commit ad9cc450ffa35abb54b0842d56f6cf6c53c6fbcc.
Revert "kc705: mirror clk200 at user_sma_clock_p"
This reverts commit 7f0dffdcdd28e648af84725682f82ec6e5642eba.
Revert "kc705: single ended rtio_external_clk"
This reverts commit a9426d983fbf5c1cb768da8f1da26d9b7335e9cf.
ad9516: 2000 MHz clock
phaser: test clock dist
phaser: test freqs
ad9154: iostandards
phaser: drop clock monitor
phaser: no separate i2c
phaser: drive rtio from refclk, wire up sysref
phaser: ttl channel for sync
ad9154: 4x interp, status, tweaks
phaser: sync/sysref 33V banks
phaser: sync/sysref LVDS_25 inputs are VCCO tolerant
phaser: user input-only ttls
phaser: rtio fully from refclk
ad9154: reg name usage fix
ad9154: check register modifications
Revert "ad9154: check register modifications"
This reverts commit 45121d90edf89f7bd8703503f9f317ad050f9564.
ad9154: fix status code
ad9154: addrinc, recal serdes pll
phaser: coredevice, example tweaks
sawg: missing import
sawg: type fixes
ad9514: move setup functions
ad9154: msb first also decreasing addr
phaser: use sys4x for rtio internal ref
phaser: move init code to main
phaser: naming cleanup
phaser: cleanup pins
phaser: move spi to kernel cpu
phaser: kernel support for ad9154 spi
ad9154: add r/w methods
ad9154: need return annotations
ad9154: r/w methods are kernels
ad9154_reg: portable helpers
phaser: cleanup startup kernel
ad9154: status test
ad9154: prbs test
ad9154: move setup, document
phaser: more documentation
2016-10-05 16:17:50 +02:00
Robert Jördens
a91ed8394c
rtio: add input-only channel
2016-10-05 16:17:50 +02:00
Robert Jördens
279f0d568d
rtio: support differential ttl
2016-10-05 16:17:50 +02:00
Sebastien Bourdeauducq
a7dd356d30
rtio/phy/ttl: support 'set sensitivity and sample' command ( #218 )
2016-09-07 15:42:09 +08:00
Sebastien Bourdeauducq
7a2405146a
rtio: do not reset DDS and SPI PHYs on RTIO reset ( #503 )
2016-07-09 10:07:19 +08:00
Sebastien Bourdeauducq
900b0cc629
analyzer: make byte_count 64-bit
2016-03-19 19:40:23 +08:00
Sebastien Bourdeauducq
1bbef94061
analyzer: fix byte_count (again)
2016-03-15 20:49:07 +08:00
Sebastien Bourdeauducq
85ea70a664
analyzer: fix byte_count
2016-03-15 20:33:08 +08:00
Sebastien Bourdeauducq
62ac4e3c2e
analyzer: fix EOP generation
2016-03-15 20:25:02 +08:00
Sebastien Bourdeauducq
b5ec979db3
analyzer: drive wishbone cyc signal
2016-03-15 19:46:12 +08:00
Sebastien Bourdeauducq
8a6873cab2
analyzer: use EOP, flush pipeline on stop
2016-03-15 17:49:59 +08:00
Florent Kermarrec
8ad799a850
gateware/rtio/analyzer: use new Converter
2016-03-14 15:15:07 +01:00
Sebastien Bourdeauducq
de718fc819
rtio: fix different address collision detection
2016-03-10 12:15:36 +08:00
Sebastien Bourdeauducq
f4f95d330b
Merge branch 'master' of github.com:m-labs/artiq
2016-03-10 11:15:30 +08:00
Sebastien Bourdeauducq
542a375305
rtio: remove NOP suppression capability
...
Back when RTIO was driving TTLs, this functionality made it simpler to use by removing some irrelevant underflows.
The same technique is not applicable to DDS and SPI, so the user will have to deal with such underflows.
This patch makes the behavior of RTIO more consistent and the code simpler.
2016-03-10 09:47:29 +08:00
Sebastien Bourdeauducq
2e39802a61
rtio/wishbone: make replace configurable
2016-03-10 09:44:05 +08:00
Robert Jördens
107e5cfbd4
gateware/rtio: factor _BlindTransfer
2016-03-09 19:07:46 +01:00
Robert Jördens
349a66124b
Merge branch 'master' into rtiobusy
...
* master:
coredevice: fix _DDSGeneric __init__ args
rtio/core: fix syntax
rtio: disable replace on rt2wb channels
examples: dds_bus -> core_dds
fix more multi-DDS-bus problems
runtime: fix dds declarations
support for multiple DDS buses (untested)
2016-03-09 17:58:58 +01:00
Robert Jördens
3f8e431de6
rtio/core: fix syntax
2016-03-09 17:10:21 +01:00
Sebastien Bourdeauducq
03b53c3af9
rtio: disable replace on rt2wb channels
2016-03-09 23:37:04 +08:00
Robert Jördens
2cb58592ff
rtio: add RTIOBusy
2016-03-08 18:04:34 +01:00
Sebastien Bourdeauducq
2953b069dc
rtio: when rtlink addresses are different, issue collision not replace ( fixes #320 )
2016-03-08 15:58:25 +08:00
Sebastien Bourdeauducq
71105fd0d7
rtio: collision_error -> collision
2016-03-08 15:38:35 +08:00
Robert Jördens
a0083f4501
Revert "gateware/rt2wb: only input when active"
...
This reverts commit 1b08e65fa1
.
2016-02-29 16:44:11 +01:00
Robert Jördens
cb8815cc65
Revert "gateware/rt2wb: support combinatorial ack"
...
This reverts commit f73228f248
.
2016-02-29 16:44:04 +01:00
Robert Jördens
f73228f248
gateware/rt2wb: support combinatorial ack
2016-02-29 15:40:55 +01:00
Robert Jördens
1b08e65fa1
gateware/rt2wb: only input when active
2016-02-29 14:56:29 +01:00
Robert Jördens
f8732acece
rtio.spi: drop unused argument
2016-02-28 21:06:20 +01:00
Robert Jördens
e7146cc999
gateware.spi: design sketch
2016-02-26 17:03:08 +01:00
Robert Jördens
68891493a3
analyzer: move common to artiq.protocols
...
migen was still pulled in through rtio.__init__.py
2016-01-29 20:26:48 -07:00
Robert Jördens
cbb60337ae
refactor Analyzer constants to unlink dependencies
2016-01-25 18:03:48 -07:00
Sebastien Bourdeauducq
080752092c
gateware/rtio: add LogChannel
2015-12-26 22:43:28 +08:00
Sebastien Bourdeauducq
9ba8dfbf23
gateware/rtio/core: avoid potential python bug
2015-12-26 22:11:57 +08:00
Sebastien Bourdeauducq
8691f69a3c
gateware/rtio/analyzer: suppress spurious initial reset messages
2015-12-21 18:32:08 +08:00
Sebastien Bourdeauducq
5769107936
gateware/rtio: keep counter clock domain transfer active during CSR reset
2015-12-20 22:12:34 +08:00
Sebastien Bourdeauducq
46f59b673f
coredevice: analyzer message decoding
2015-12-20 14:34:16 +08:00
Sebastien Bourdeauducq
1638f0fa9b
gateware/rtio/analyzer: fix event ordering
2015-12-19 17:04:30 +08:00
Sebastien Bourdeauducq
64ad38854b
gateware/rtio/analyzer: fix exception message layout
2015-12-18 18:27:06 +08:00
Sebastien Bourdeauducq
59a3ea4f15
gateware/rtio/analyzer: fix bus write
2015-12-18 15:44:20 +08:00
Sebastien Bourdeauducq
afaad270cc
rtio/analyzer: fix superficial mistakes
2015-12-16 17:36:36 +08:00
Sebastien Bourdeauducq
4362f97d67
gateware/rtio/analyzer: complete, untested
2015-12-14 23:53:14 +08:00
Sebastien Bourdeauducq
b5f2e178f6
rtio/analyzer: message encoder
2015-12-14 00:37:08 +08:00
Sebastien Bourdeauducq
e26147b2ac
gateware,runtime: use new migen/misoc
2015-11-04 00:35:03 +08:00
Sebastien Bourdeauducq
e46ba83513
rtio/dds: use rio_phy domain to reset FTW tracker. Closes #120
2015-10-04 22:53:51 +08:00
Robert Jördens
01416bb0be
copyright: claim contributions
...
These are contributions of >= 30% or >= 20 lines (half-automated).
I hereby resubmit all my previous contributions to the ARTIQ project
under the following terms:
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/ >.
Closes #130
Signed-off-by: Robert Jordens <jordens@gmail.com>
2015-09-06 16:08:57 -06:00
Sebastien Bourdeauducq
90ce54d8d5
gateware/dds/monitor: support onehot selection, strip reset
2015-08-27 15:54:01 +08:00
Sebastien Bourdeauducq
1d34c06d79
rtio: detect collision errors
2015-07-29 19:43:35 +08:00
Robert Jördens
fb339d294e
serdes_s6: no need to reset
2015-07-28 12:54:31 -06:00
Robert Jördens
9ac5bc52d4
rtio: add spartan6 serdes, 4x and 8x
2015-07-27 21:01:15 -06:00
Sebastien Bourdeauducq
b1d58bd4c8
rtio: fix replace/sequence_error when fine_ts_width > 0
2015-07-27 12:22:35 +08:00
Sebastien Bourdeauducq
959b7a7b46
rtio: resetless -> reset_less
2015-07-27 11:46:56 +08:00
Sebastien Bourdeauducq
fe6a5c42df
rtio: remove unused clk_freq argument
2015-07-27 10:57:15 +08:00
Sebastien Bourdeauducq
5b50f5fe05
rtio/ttl_serdes_7series: use recommended OSERDES T configuration
2015-07-27 10:50:50 +08:00
Sebastien Bourdeauducq
f68d5cbd73
rtio: forward rtio domain reset to rio and rio_phy domains
2015-07-27 01:52:47 +08:00
Sebastien Bourdeauducq
940aa815dd
rtio/ttl_serdes: cleanup/rewrite
2015-07-27 01:44:52 +08:00
Yann Sionneau
d90dff4ef1
rtio: add SERDES TTL (WIP)
2015-07-26 17:40:34 +08:00
Robert Jördens
47191eda91
dds monitor: relax timing (for pipistrello)
2015-07-19 21:36:51 -06:00
Sebastien Bourdeauducq
66940ea815
rtio: disable NOP suppression after reset and underflow
2015-07-15 20:54:55 +02:00
Sebastien Bourdeauducq
8a33d8c868
never stop RTIO counter
2015-07-07 15:29:38 +02:00
Sebastien Bourdeauducq
58c0150822
ttl: improve clockgen doc
2015-07-05 19:07:13 +02:00
Sebastien Bourdeauducq
753d61b38f
complete support for TTL clock generator
2015-07-04 18:36:01 +02:00
Sebastien Bourdeauducq
2881d5f00a
gateware: add RTIO clock generator
2015-07-02 18:20:26 +02:00
Sebastien Bourdeauducq
944bfafefa
soc: support QC2 and AD9914 (untested)
2015-06-28 21:37:27 +02:00
Sebastien Bourdeauducq
f47c2e54e1
DDS monitor fixes
2015-06-19 17:36:46 -06:00
Sebastien Bourdeauducq
5a9bdb2e33
DDS monitoring
2015-06-19 15:30:17 -06:00
Sebastien Bourdeauducq
b2af0f6cc3
soc,runtime: support TTL override
2015-06-09 19:51:02 +08:00
Sebastien Bourdeauducq
a2ae5e4706
runtime: report TTL status over UDP
2015-06-03 18:26:19 +08:00
Sebastien Bourdeauducq
b81151eb42
soc: rtio monitor
2015-06-02 17:41:40 +08:00
Sebastien Bourdeauducq
a36c51eb83
DDS over RTIO (batch mode not supported yet)
2015-05-08 14:44:39 +08:00
Sebastien Bourdeauducq
cb65b1e322
rtio/phy/ttl_simple: reset sensitivity with RTIO logic
2015-05-02 16:17:31 +08:00
Sebastien Bourdeauducq
a61d701d47
rtio: decouple PHY reset from logic reset
2015-05-02 11:47:11 +08:00
Sebastien Bourdeauducq
27d94a22de
rtio: expose full_ts_width instead of counter_width parameter
2015-04-28 01:38:11 +08:00
Sebastien Bourdeauducq
546996f896
coredevice,runtime: put ref_period into the ddb
2015-04-16 15:15:38 +08:00
Sebastien Bourdeauducq
71167b8adf
rtio: do not attempt latency compensation in gateware
2015-04-16 13:09:29 +08:00
Sebastien Bourdeauducq
6215d63491
rtio: do not create spurious CSRs when data_width/address_width is 0
2015-04-16 13:04:19 +08:00
Sebastien Bourdeauducq
26003781b4
rtio/rtlink: add 'like' methods to clone interfaces
2015-04-16 13:02:39 +08:00
Sebastien Bourdeauducq
30dffb6644
rtio/phy: add wishbone adapter
2015-04-15 20:39:40 +08:00
Sebastien Bourdeauducq
4c10182c9f
rtio: refactor, use rtlink
2015-04-14 19:44:45 +08:00
Sebastien Bourdeauducq
ff9a7727d2
rtio: add rtlink definition (currently unused)
2015-04-13 22:19:18 +08:00
Florent Kermarrec
2995f0a705
remove use of _r prefix on CSRs
2015-04-02 18:30:44 +08:00
Sebastien Bourdeauducq
3122623c6f
rtio: make 63-bit timestamp counter the default [soc]
2015-03-12 13:13:35 +01:00
Sebastien Bourdeauducq
28bce9ee40
artiqlib -> artiq.gateware
2015-03-08 11:00:24 +01:00