Commit Graph

51 Commits

Author SHA1 Message Date
f3fa369940 Fix grammatical error 2020-10-23 15:47:00 +08:00
b391f0e413 Remove dependence on custom version of nMigen 2020-10-23 15:02:11 +08:00
e3a8229ac2 Rewrite sorting network to follow nMigen convention 2020-10-23 14:57:29 +08:00
3c1db87457 Update README 2020-10-23 11:15:47 +08:00
69a3e5606f Add mention of Nix in "Running the verification tasks" 2020-10-23 10:43:43 +08:00
2f9d4a6348 Add instructions for running verification 2020-10-23 10:39:16 +08:00
01026026fa Refine assertions for case with replacements in sorting network 2020-10-23 10:31:56 +08:00
25a8a741bb Refine assertions for case with replacements in sorting network 2020-10-22 13:32:12 +08:00
40930878a2 Add assertions for case with replacements 2020-10-22 12:53:55 +08:00
04640794b9 Add breakdown of cmp_wrap() for reference 2020-10-22 11:27:08 +08:00
1766fbeca9 Prepare rtio.sed.output_network for assertions on replacements 2020-10-22 10:56:59 +08:00
c8775cba44 Remove outdated failing trace 2020-10-21 14:49:02 +08:00
96d470921b Fix assertions for no replacements case 2020-10-21 14:03:35 +08:00
b7a69557de Add assertion for no replacements given unique inputs 2020-10-21 13:09:54 +08:00
67130ed79e Add uniqueness assertion for case with no replacements 2020-10-21 12:40:16 +08:00
d8c40ce382 Add failing trace and trace analysis 2020-10-20 13:05:38 +08:00
b9481cecf5 Reduce lane count to 4 for easier debugging 2020-10-20 11:40:19 +08:00
577a8083f1 Add refactoring/restructuring to TODO list in README 2020-10-19 14:42:38 +08:00
8fe67cf6f4 Skip assertions for configurable no. of clock cycles 2020-10-19 12:39:32 +08:00
5011245007 Increase BMC depth for sorting network assertions 2020-10-16 13:41:38 +08:00
036c91539b Start preparing assertions for sorting network 2020-10-16 12:18:09 +08:00
ec957ad411 Fix keyword argument issue for read_port in rtio.cri 2020-10-15 13:11:06 +08:00
b4ec588630 Fix keyword argument issue in rtio.cri 2020-10-14 17:26:38 +08:00
ceab41f9da Fix broken markdown in README 2020-10-14 16:50:57 +08:00
3d65ca01e4 Update README 2020-10-14 16:50:01 +08:00
6746052a60 Add rtio.sed.output_driver 2020-10-09 11:16:01 +08:00
1d5945f7fa Add rtio.sed.output_network 2020-10-08 17:05:04 +08:00
7db66ee9a0 Update shell.nix 2020-10-08 13:52:35 +08:00
c2ee2fbdef Add rtio.sed.layouts 2020-10-08 11:06:35 +08:00
fd1b469322 Remove redundant (object) in rtio.rtlink 2020-10-08 09:34:29 +08:00
1f838186e8 Add rtio.rtlink 2020-10-07 16:32:20 +08:00
3cbcb630bd Add rtio.rtlink to progress list 2020-10-07 16:06:01 +08:00
85d1523b52 Add rtio.cri 2020-10-07 12:01:37 +08:00
8d3c69ea08 Remove redundant files 2020-09-30 12:33:50 +08:00
cc2c1ea11c Refine progress checklist to focus on CRI and outputs 2020-09-30 12:21:45 +08:00
c9857bb831 Reset translation progress 2020-09-30 10:55:08 +08:00
a3cdb44572 Add WIP implementation of rtio.sed.output_driver 2020-09-29 17:27:43 +08:00
36fb6306b0 Add rtio.sed.output_network 2020-09-29 16:35:59 +08:00
7c742dc2d1 Add rtio.sed.lane_distributor 2020-09-28 16:01:43 +08:00
bf08fe1d50 Add partial implementation of lane distributor 2020-09-28 11:36:26 +08:00
49684c1990 Add partial implementation of CRI interface 2020-09-25 16:27:56 +08:00
1a83778590 Remove redundant 'artiq.gateware' from module names 2020-09-25 15:10:07 +08:00
a788c17e3d Add artiq.gateware.rtio.sed.layouts 2020-09-25 13:26:01 +08:00
9e81676fd2 Add artiq.gateware.rtio.channel 2020-09-25 12:59:23 +08:00
f7c1cc23a5 Implement artiq.gateware.rtio.rtlink 2020-09-25 12:49:14 +08:00
0ec4604219 Add project structure 2020-09-25 12:04:28 +08:00
2eb682ee3e Update README 2020-09-24 15:43:33 +08:00
79aad630d2 Add shell.nix 2020-09-24 15:11:24 +08:00
4046b4769d Update README.md 2020-09-23 17:16:58 +08:00
0cc229e9d6 Add README and LICENSE 2020-09-23 17:14:27 +08:00