Formally verified ARTIQ RTIO core in nMigen
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rtio-nmigen

Formally verified implementation of the ARTIQ RTIO core in nMigen

Progress

  • Implement the core in nMigen
    • rtio.core
    • rtio.cri
    • rtio.rtlink
    • rtio.channel
    • rtio.sed.core
    • rtio.sed.layouts
    • rtio.sed.lane_distributor
    • rtio.sed.fifos
    • rtio.sed.gates
    • rtio.sed.output_driver
    • rtio.sed.output_network
    • rtio.input_collector
  • Add suitable assertions for verification (BMC / unbounded proof?)

License

Copyright (C) 2020 M-Labs Limited.

LGPLv3 or any later version