M-Labs/rtio-nmigen
7
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
Formally verified ARTIQ RTIO core in nMigen
70 Commits 1 Branch 0 Tags 98 KiB
Python 98.3%
Nix 1.7%
master
Go to file
Donald Sebastian Leung e82a82538b Add simulation for CRI write command(?)
2020-11-18 10:49:03 +08:00
rtio Add simulation for CRI write command(?) 2020-11-18 10:49:03 +08:00
LICENSE Add README and LICENSE 2020-09-23 17:14:27 +08:00
README.md Measure completion time for each unbounded proof 2020-11-11 13:59:40 +08:00
shell.nix Remove dependence on custom version of nMigen 2020-10-23 15:02:11 +08:00

README.md

rtio-nmigen

Formally verified implementation of the ARTIQ RTIO core in nMigen

File Synopsis

  • LICENSE: License terms (LGPLv3+) for this project
  • README.md: this document
  • shell.nix: Nix file for setting up the environment for this project
  • rtio: RTIO core in nMigen

Running the verification tasks

To run the verification tasks for the sorting network (unbounded proofs with variable numbers of lanes), change directory to the root of this project, set up the Nix environment by running nix-shell and do

$ python -m rtio.test.sed.output_network

This should complete in under an hour. The time to complete each verification task (2 lanes, 4 lanes, 8 lanes) is printed to standard output.

License

Copyright (C) 2020 M-Labs Limited.

LGPLv3 or any later version