M-Labs
/
rtio-nmigen
7
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Update README

pull/1/head
Donald Sebastian Leung 2020-09-24 15:43:33 +08:00
parent 79aad630d2
commit 2eb682ee3e
1 changed files with 13 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
README.md
View File

@ -5,6 +5,19 @@ Formally verified implementation of the ARTIQ RTIO core in nMigen
## Progress
- [ ] Implement the core in nMigen
- - [ ] `artiq.gateware.rtio.core`
- - [ ] `misoc.interconnect.csr`
- - [ ] `artiq.gateware.rtio.cri`
- - [ ] `artiq.gateware.rtio.rtlink`
- - [ ] `artiq.gateware.rtio.channel`
- - [ ] `artiq.gateware.rtio.sed.core`
- - [ ] `artiq.gateware.rtio.sed.layouts`
- - [ ] `artiq.gateware.rtio.sed.lane_distributor`
- - [ ] `artiq.gateware.rtio.sed.fifos`
- - [ ] `artiq.gateware.rtio.sed.gates`
- - [ ] `artiq.gateware.rtio.sed.output_driver`
- - [ ] `artiq.gateware.rtio.sed.output_network`
- - [ ] `artiq.gateware.rtio.input_collector`
- [ ] Add suitable assertions for verification (BMC / unbounded proof?)
## License