M-Labs/rtio-nmigen
7
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
Formally verified ARTIQ RTIO core in nMigen
25 Commits 1 Branch 0 Tags 98 KiB
Python 98.3%
Nix 1.7%
1d5945f7fa
Go to file
Donald Sebastian Leung 1d5945f7fa Add rtio.sed.output_network
2020-10-08 17:05:04 +08:00
rtio Add rtio.sed.output_network 2020-10-08 17:05:04 +08:00
LICENSE Add README and LICENSE 2020-09-23 17:14:27 +08:00
README.md Add rtio.sed.output_network 2020-10-08 17:05:04 +08:00
shell.nix Update shell.nix 2020-10-08 13:52:35 +08:00

README.md

rtio-nmigen

Formally verified implementation of the ARTIQ RTIO core in nMigen

Progress

  • Devise a suitable migration strategy for artiq.gateware.rtio from Migen to nMigen
  • Implement the core in nMigen
    • rtio.cri (Interface and CRIDecoder only)
    • rtio.rtlink
    • rtio.sed.layouts
    • rtio.sed.output_network
    • rtio.sed.output_driver
  • Add suitable assertions for verification (BMC / unbounded proof?)

License

Copyright (C) 2020 M-Labs Limited.

LGPLv3 or any later version