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Formally verified ARTIQ RTIO core in nMigen
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README.md

rtio-nmigen

Formally verified implementation of the ARTIQ RTIO core in nMigen

File Synopsis

  • LICENSE: License terms (LGPLv3+) for this project
  • README.md: this document
  • shell.nix: Nix file for setting up the environment for this project
  • rtio: RTIO core in nMigen
  • traces: History of traces for debugging

Progress

  • Devise a suitable migration strategy for artiq.gateware.rtio from Migen to nMigen
  • Implement the core in nMigen
    • rtio.cri (Interface and CRIDecoder only)
    • rtio.rtlink
    • rtio.sed.layouts
    • rtio.sed.output_network
    • rtio.sed.output_driver
  • Add suitable assertions for verification (BMC / unbounded proof?)
    • rtio.cri (Interface and CRIDecoder only)
    • rtio.rtlink
    • rtio.sed.layouts
    • rtio.sed.output_network - Sorting network (high priority)
    • rtio.sed.output_driver
  • Restructure to code to follow nMigen convention and re-validate existing assertions

License

Copyright (C) 2020 M-Labs Limited.

LGPLv3 or any later version