Refine progress checklist to focus on CRI and outputs

README.md

@@ -6,18 +6,10 @@ Formally verified implementation of the ARTIQ RTIO core in nMigen
 
 - Devise a suitable migration strategy for `artiq.gateware.rtio` from Migen to nMigen
 - [ ] Implement the core in nMigen
-- - [ ] `rtio.core`
 - - [ ] `rtio.cri`
-- - [ ] `rtio.rtlink`
-- - [ ] `rtio.channel`
-- - [ ] `rtio.sed.core`
 - - [ ] `rtio.sed.layouts`
-- - [ ] `rtio.sed.lane_distributor`
-- - [ ] `rtio.sed.fifos`
-- - [ ] `rtio.sed.gates`
-- - [ ] `rtio.sed.output_driver`
 - - [ ] `rtio.sed.output_network`
-- - [ ] `rtio.input_collector`
+- - [ ] `rtio.sed.output_driver`
 - [ ] Add suitable assertions for verification (BMC / unbounded proof?)
 
 ## License