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Refine progress checklist to focus on CRI and outputs

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Donald Sebastian Leung 2020-09-30 12:21:45 +08:00
parent c9857bb831
commit cc2c1ea11c
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@ -6,18 +6,10 @@ Formally verified implementation of the ARTIQ RTIO core in nMigen
- Devise a suitable migration strategy for `artiq.gateware.rtio` from Migen to nMigen
- [ ] Implement the core in nMigen
- - [ ] `rtio.core`
- - [ ] `rtio.cri`
- - [ ] `rtio.rtlink`
- - [ ] `rtio.channel`
- - [ ] `rtio.sed.core`
- - [ ] `rtio.sed.layouts`
- - [ ] `rtio.sed.lane_distributor`
- - [ ] `rtio.sed.fifos`
- - [ ] `rtio.sed.gates`
- - [ ] `rtio.sed.output_driver`
- - [ ] `rtio.sed.output_network`
- - [ ] `rtio.input_collector`
- - [ ] `rtio.sed.output_driver`
- [ ] Add suitable assertions for verification (BMC / unbounded proof?)
## License