- TXOUT must be fed back into TXUSRCLK during initialization
- Now, MMCM Clock Input is switched before GTP TX Init is started instead of after GTP TX Init is done
- Reset in Sys Clock domain is kept asserted when clock is switched and GTP TX Init is NOT done
- remove default Shuttler "drtio_destination" value in jsonschema
- set the default Shuttler "drtio_destination" value according to
board "target" and "hw_rev"
Function calls in general can still be used to hide escaping
allocations from the compiler (issue #1497), but these calls in
particular always allocate, so we can easily and accurately handle
them.
This turned out to be a race between the dashboard's dataset db
subscriber being initialised and the applet "embed" request, with
artiq.applet.simple not being able to handle the unexpected "mod"
message. We were only handling the other ordering outcome of this
race before.
This maps basic Python types (float, str, bool, np.int32, np.int64) as well as
some generics (list, tuple) to ARTIQ's own type instances.
Signed-off-by: Jonathan Coates <jonathan.coates@oxionics.com>
The type checker/inferer visits every node in an AST tree, including
function return annotations. This means for a function definition like
def f() -> TTuple([TInt32, TBool]):
...
We attempt to type check the list [TInt32, TBool], which generates the
unification constraint builtins.TBool ~ builtins.TInt. This causes an
internal error due to compiler weirdness.
We can avoid this by just nulling-out the return annotation in the
embedding stage. The return type isn't actually used anywhere (it's
extracted via the inspect module instead), so this is entirely safe.
Arguments aren't affected by this, as we already nulled out the
annotation (see visit_arg in embedding.py).
Signed-off-by: Jonathan Coates <jonathan.coates@oxionics.com>
The original fix in 21574bdfa9
was incomplete, as it only addressed the TInstance types, but
not their linked (typ.constructor) TConstructor instances.
This would (potentially among other issues) cause assertion
errors in llvm_ir_generator due to the wrong associated globals
being referenced; see added test case for an example that
previously caused such a crash.
Also modified the name collision detection from O(len(type_map))
(so quadratic overall in the number of custom types) to cache
names in sets for O(1) lookup.
* ddb: generate shuttler coredevice entries
* ddb: split-off all DRTIO-over-EEM peripherals
Only EFC uses DRTIO-over-EEM at this moment. It will be relevant to phaser-DRTIO in the future.
* ddb: generalize efc processing into drtio-over-eem peripherals
* ddb: check DRTIO role validity before processing
This example code:
- Demonstrates the init flow for Shuttler
- Blinks LED L0, L1
- Demonstrates the real-time control of relay
- Includes example fns for configuring the PDQ Output Channel in mu
- Intend to maintain the same pipeline latency across all DACs on Shuttler
- Force the RETIMER-CLK to be PHASE 1 on all DACs
- See Issue #2200 for details
These were introduced in 82bd913f63, and for Kasli only set from
the JSON description in the *Generic subclasses. Not all firmware
is built through that API, however, e.g. the CI system at the
University of Oxford. The missing attribute breaks artiq.build_soc.
I had introduced this in f11aef74b as a means of quickly cleaning up
after e.g. an exploratory session where a lot of transient applets were
opened from ndscan, or for a dashboard that has been running for a while
with CCBs enabled but without anybody actually working there.
It turns out that one usually wants the few docked applets to stay open,
as they were necessarily arranged manually at some prior point. And as a
corollary to the latter, if one did want to close them as well, doing so
manually would not be too onerous either.
This only allows for indexing with a constant value (e.g. x[0]).
While slices would be possible to implement, it's not clear how to
preserve type inference here. The current typing rule is:
Γ ⊢ x : τ Γ ⊢ a : Int Γ ⊢ b : Int
------------------------------------
Γ ⊢ x[a:b] : τ
However, tuples would require a different typing rule, and so we'd need
to defer type inference if τ is a tyvar. I'm not confident that this
won't change behaviour, so we leave as-is for now.
Signed-off-by: Jonathan Coates <jonathan.coates@oxionics.com>
This would have caught the reduction in header padding with LLD 14.
In theory, we could just get rid of the hard-coded kernel CPU address
ranges altogether and use ksupport.elf as the one source of truth; the
code already exists in dyld. The actual base address of the file would
still need to be forwarded to the kernel-side libunwind glue, though,
as there doesn't seem to be a clean way to get the equivalent of
KSUPPORT_HEADER_SIZE through the linker script. I have left this as-is
with the hard-coded KERNELCPU_… constants for now.
Previous linker versions had inserted some zero padding bytes
between the ELF headers and the first section, but LLD 14 does
not anymore.
Hard-coding the offset of the first section in ksupport.elf
manually isn't ideal; we should probably parse the ELF program
headers instead when first setting up the kernel CPU.
Receiving an empty string in an RPC call currently panics.
When `length` is zero, a call to the `alloc` function (as implemented in `artiq/firmware/runtime/session.rs`) returns a null pointer. Constructing a `CMutSlice` from a null pointer panics.
A `CMutSlice` consists of a pointer and the length. Rust's documentation of the `core::ptr` module states: "The canonical way to obtain a pointer that is valid for zero-sized accesses is `NonNull::dangling`."
This commits adds a check for the length of a string received in an RPC call. Only for lengths greater than zero a memory allocation is performed. For zero-length strings, a dangling pointer is used.
Test plan:
Invoke the following experiment, which returns an empty string over RPC:
```
class ReturnEmptyString(artiq.experiment.EnvExperiment):
def build(self):
self.core: Core = self.get_device("core")
@kernel
def run(self):
x = self.do_rpc()
print(x)
@rpc
def do_rpc(self) -> TStr:
return ""
```
Signed-off-by: Sven Over (Oxford Ionics) <sven.over@oxionics.com>
Change initialization behaviour of GTX transceivers
--
Modify the config parms CPLL of GTX transceiver for PLL to lock correctly
Modify the enabling requirement of GTX input clock buffer IBUFDS_GTE2 so
that it depends on GTX PLL locked signal instead of TX Init Done
Modify the GTX Init FSM so that BruteForceClock Aligner can reset GTX
transceiver without resetting the GTX transceiver PLL
kasli-soc: fix of SYS CLK switch failure
Changed initialization of GTX transceivers.
Successful SYS CLK switching requires IBUFDS_GTE2 to be properly enabled and not disabled during GTX transceiver initialization.
For this reason, CPLL is not reset during GTX initialization and clock alignment.
kasli-soc: refractor fix of SYS CLK switch failure
Remove gtXxreset & cpllreset assertion and deassertion
The removed code does not affect the fix
