forked from M-Labs/artiq
shuttler: cleanup
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@ -1,5 +1,3 @@
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import numpy
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from artiq.language.core import *
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from artiq.language.types import *
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from artiq.coredevice.rtio import rtio_output, rtio_input_data
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@ -106,7 +104,7 @@ class Config:
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return rtio_input_data(self.channel)
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class Volt:
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class DCBias:
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"""Shuttler Core cubic DC-bias spline.
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A Shuttler channel can generate a waveform `w(t)` that is the sum of a
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@ -138,7 +136,7 @@ class Volt:
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def set_waveform(self, a0: TInt32, a1: TInt32, a2: TInt64, a3: TInt64):
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"""Set the DC-bias spline waveform.
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Given `a(t)` as defined in :class:`Volt`, the coefficients should be
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Given `a(t)` as defined in :class:`DCBias`, the coefficients should be
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configured by the following formulae.
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.. math::
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@ -181,7 +179,7 @@ class Volt:
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delay_mu(int64(self.core.ref_multiplier))
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class Dds:
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class DDS:
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"""Shuttler Core DDS spline.
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A Shuttler channel can generate a waveform `w(t)` that is the sum of a
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@ -218,7 +216,7 @@ class Dds:
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c0: TInt32, c1: TInt32, c2: TInt32):
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"""Set the DDS spline waveform.
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Given `b(t)` and `c(t)` as defined in :class:`Dds`, the coefficients
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Given `b(t)` and `c(t)` as defined in :class:`DDS`, the coefficients
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should be configured by the following formulae.
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.. math::
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@ -295,7 +293,7 @@ class Trigger:
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Each bit corresponds to a Shuttler waveform generator core. Setting
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`trig_out` bits commits the pending coefficient update (from
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`set_waveform` in :class:`Volt` and :class:`Dds`) to the Shuttler Core
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`set_waveform` in :class:`DCBias` and :class:`DDS`) to the Shuttler Core
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synchronously.
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:param trig_out: Coefficient update trigger bits. The MSB corresponds
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@ -582,7 +580,7 @@ class ADC:
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:meth:`Config.set_offset`
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:param volts: A list of all 16 cubic DC-bias spline.
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(See :class:`Volt`)
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(See :class:`DCBias`)
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:param trigger: The Shuttler spline coefficient update trigger.
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:param config: The Shuttler Core configuration registers.
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:param samples: A list of sample voltages for calibration. There must
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@ -1,12 +1,12 @@
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{
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"target": "kasli",
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"variant": "master",
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"variant": "shuttlerdemo",
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"hw_rev": "v2.0",
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"base": "master",
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"drtio_role": "master",
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"peripherals": [
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{
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"type": "shuttler",
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"ports": [0]
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"ports": [0]
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},
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{
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"type": "dio",
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@ -60,7 +60,7 @@ class Shuttler(EnvExperiment):
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self.shuttler0_leds = [ self.get_device("shuttler0_led{}".format(i)) for i in range(2) ]
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self.setattr_device("shuttler0_config")
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self.setattr_device("shuttler0_trigger")
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self.shuttler0_volt = [ self.get_device("shuttler0_volt{}".format(i)) for i in range(16) ]
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self.shuttler0_dcbias = [ self.get_device("shuttler0_dcbias{}".format(i)) for i in range(16) ]
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self.shuttler0_dds = [ self.get_device("shuttler0_dds{}".format(i)) for i in range(16) ]
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self.setattr_device("shuttler0_relay")
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self.setattr_device("shuttler0_adc")
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@ -102,7 +102,7 @@ class Shuttler(EnvExperiment):
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@kernel
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def shuttler_channel_reset(self, ch):
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self.shuttler0_volt[ch].set_waveform(
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self.shuttler0_dcbias[ch].set_waveform(
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a0=0,
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a1=0,
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a2=0,
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@ -226,7 +226,7 @@ class Shuttler(EnvExperiment):
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delay(500*us)
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## Step 5 ##
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self.shuttler0_volt[0].set_waveform(
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self.shuttler0_dcbias[0].set_waveform(
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a0=shuttler_volt_amp_mu(-5.0),
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a1=int32(shuttler_volt_damp_mu(0.01)),
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a2=0,
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@ -241,7 +241,7 @@ class Shuttler(EnvExperiment):
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c1=shuttler_freq_mu(end_f_MHz),
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c2=0,
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)
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self.shuttler0_volt[1].set_waveform(
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self.shuttler0_dcbias[1].set_waveform(
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a0=shuttler_volt_amp_mu(-5.0),
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a1=int32(shuttler_volt_damp_mu(0.01)),
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a2=0,
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@ -260,7 +260,7 @@ class Shuttler(EnvExperiment):
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delay(1000*us)
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## Step 6 ##
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self.shuttler0_volt[0].set_waveform(
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self.shuttler0_dcbias[0].set_waveform(
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a0=shuttler_volt_amp_mu(-2.5),
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a1=int32(shuttler_volt_damp_mu(0.01)),
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a2=0,
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@ -280,7 +280,7 @@ class Shuttler(EnvExperiment):
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delay(500*us)
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## Step 7 ##
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self.shuttler0_volt[0].set_waveform(
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self.shuttler0_dcbias[0].set_waveform(
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a0=shuttler_volt_amp_mu(2.5),
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a1=int32(shuttler_volt_damp_mu(-0.01)),
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a2=0,
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@ -327,4 +327,4 @@ class Shuttler(EnvExperiment):
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# The actual output voltage is limited by the hardware, the calculated calibration gain and offset.
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# For example, if the system has a calibration gain of 1.06, then the max output voltage = 10 / 1.06 = 9.43V.
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# Setting a value larger than 9.43V will result in overflow.
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self.shuttler0_adc.calibrate(self.shuttler0_volt, self.shuttler0_trigger, self.shuttler0_config)
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self.shuttler0_adc.calibrate(self.shuttler0_dcbias, self.shuttler0_trigger, self.shuttler0_config)
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@ -652,10 +652,10 @@ class PeripheralManager:
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channel=rtio_offset + next(channel))
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for i in range(16):
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self.gen("""
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device_db["{name}_volt{ch}"] = {{
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device_db["{name}_dcbias{ch}"] = {{
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"type": "local",
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"module": "artiq.coredevice.shuttler",
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"class": "Volt",
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"class": "DCBias",
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"arguments": {{"channel": 0x{channel:06x}}},
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}}""",
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name=shuttler_name,
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@ -665,7 +665,7 @@ class PeripheralManager:
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device_db["{name}_dds{ch}"] = {{
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"type": "local",
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"module": "artiq.coredevice.shuttler",
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"class": "Dds",
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"class": "DDS",
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"arguments": {{"channel": 0x{channel:06x}}},
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}}""",
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name=shuttler_name,
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