|
|
6461f455d6
|
Add BEQ instruction
|
2020-08-11 16:46:07 +08:00 |
|
|
|
edadb8da47
|
Add RV32I SB-Type Instruction Format
|
2020-08-11 16:37:42 +08:00 |
|
|
|
507675b59f
|
Update README.md
|
2020-08-11 14:54:27 +08:00 |
|
|
|
a78309d997
|
Add SW instruction
|
2020-08-11 14:52:59 +08:00 |
|
|
|
ec86b3a76a
|
Add SH instruction
|
2020-08-11 14:51:34 +08:00 |
|
|
|
c368060315
|
Add SB instruction
|
2020-08-11 14:50:04 +08:00 |
|
|
|
0f71c1dad1
|
Add RV32I S-Type Instruction Format
|
2020-08-11 14:00:04 +08:00 |
|
|
|
70c417f920
|
Update README.md
|
2020-08-11 10:08:11 +08:00 |
|
|
|
c938eefe41
|
Update README.md
|
2020-08-10 17:37:47 +08:00 |
|
|
|
31753e3679
|
Add ANDI instruction
|
2020-08-10 17:35:43 +08:00 |
|
|
|
c258d541af
|
Add ORI instruction
|
2020-08-10 17:34:22 +08:00 |
|
|
|
4b79b06dba
|
Add XORI instruction
|
2020-08-10 17:32:55 +08:00 |
|
|
|
71f8a594a6
|
Add SLTIU instruction
|
2020-08-10 17:29:55 +08:00 |
|
|
|
84f4b75267
|
Add SLTI instruction
|
2020-08-10 17:24:50 +08:00 |
|
|
|
0ae11e12b5
|
Add ADDI instruction
|
2020-08-10 17:19:57 +08:00 |
|
|
|
036f842faa
|
Add RV32I I-Type Instruction (Arithmetic Variation)
|
2020-08-10 17:12:09 +08:00 |
|
|
|
d60c712704
|
Update README.md
|
2020-08-10 16:47:09 +08:00 |
|
|
|
42b8e5c245
|
Add LHU instruction
|
2020-08-10 16:44:08 +08:00 |
|
|
|
462e526e71
|
Add LBU instruction
|
2020-08-10 16:40:45 +08:00 |
|
|
|
7b440f0fa9
|
Add LW instruction
|
2020-08-10 16:35:37 +08:00 |
|
|
|
c88cf830fc
|
Add LH instruction
|
2020-08-10 16:29:42 +08:00 |
|
|
|
167d654be8
|
Add LB instruction
|
2020-08-10 16:26:29 +08:00 |
|
|
|
bfd8f670c2
|
Add RV32I I-Type Instruction (Load Variation)
|
2020-08-10 16:16:30 +08:00 |
|
|
|
10296cbf3b
|
Update README
|
2020-08-10 14:14:40 +08:00 |
|
|
|
1cae183569
|
Add JALR instruction
|
2020-08-10 14:13:25 +08:00 |
|
|
|
e97a86bfbe
|
Add (generic) RV32I I-Type Instruction
|
2020-08-10 13:32:04 +08:00 |
|
|
|
ff977c0e50
|
Update README.md
|
2020-08-10 12:59:00 +08:00 |
|
|
|
475c1d9fc2
|
Add SRAI instruction
|
2020-08-10 12:56:19 +08:00 |
|
|
|
20a500157b
|
Add attribution to SO in InsnSra.py
|
2020-08-10 12:46:09 +08:00 |
|
|
|
9740470c47
|
Add SRLI instruction
|
2020-08-10 12:35:49 +08:00 |
|
|
|
031f335325
|
Fix SLLI instruction
|
2020-08-10 12:31:20 +08:00 |
|
|
|
1fb51e614d
|
Add SLLI instruction
|
2020-08-10 12:29:52 +08:00 |
|
|
|
94faa3ba68
|
Remove redundancy in super() calls
|
2020-08-10 11:15:05 +08:00 |
|
|
|
9e64c7ee17
|
Add RV32I I-Type Instruction (Shift Variation)
|
2020-08-07 16:39:14 +08:00 |
|
|
|
1c0541cd12
|
Document RV32I R-Type Instructions
|
2020-08-07 16:06:15 +08:00 |
|
|
|
9bfd155b44
|
Add AND instruction
|
2020-08-07 15:57:19 +08:00 |
|
|
|
07e4c04b26
|
Add OR instruction
|
2020-08-07 15:54:18 +08:00 |
|
|
|
d06daac123
|
Add SRA instruction
|
2020-08-07 15:51:21 +08:00 |
|
|
|
4f7cf5a370
|
Add SRL instruction
|
2020-08-07 15:39:46 +08:00 |
|
|
|
d106ceede7
|
Add XOR instruction
|
2020-08-07 15:35:40 +08:00 |
|
|
|
cab30848e9
|
Add SLTU instruction
|
2020-08-07 15:33:18 +08:00 |
|
|
|
d33dc1b137
|
Add SLT instruction
|
2020-08-07 15:29:54 +08:00 |
|
|
|
44bdff60c8
|
Add SLL instruction
|
2020-08-07 15:25:05 +08:00 |
|
|
|
060dd98919
|
Add SUB instruction
|
2020-08-07 14:00:12 +08:00 |
|
|
|
ccc1bd098b
|
Add ADD instruction
|
2020-08-07 13:54:00 +08:00 |
|
|
|
4f7b11d009
|
Add RV32I R-Type Instruction
|
2020-08-07 13:45:35 +08:00 |
|
|
|
2e2300e5c8
|
Update insns/README.md
|
2020-08-07 12:54:31 +08:00 |
|
|
|
a8cf15e123
|
Add generic instruction class
|
2020-08-07 12:28:52 +08:00 |
|
|
|
56048099b3
|
Correct typo in insns/README.md
|
2020-08-06 16:44:54 +08:00 |
|
|
|
9a3cb8e88a
|
Fix table formatting in insns/README.md
|
2020-08-06 14:45:51 +08:00 |
|
|
|
7c420cce7a
|
Categorize all (to be) supported instructions
|
2020-08-06 14:13:00 +08:00 |
|
|
|
3eaed129c2
|
Begin re-organization of project structure
|
2020-08-06 12:36:01 +08:00 |
|
|
|
7c60451bfa
|
Add README for instructions
|
2020-08-05 12:54:46 +08:00 |
|
|
|
c4e30e9c55
|
Add REMU instruction
|
2020-08-04 17:17:37 +08:00 |
|
|
|
af8704cea0
|
Add REM instruction
|
2020-08-04 17:14:46 +08:00 |
|
|
|
78fb149761
|
Add DIVU instruction
|
2020-08-04 17:12:13 +08:00 |
|
|
|
2a809073a5
|
Add DIV instruction
|
2020-08-04 17:09:21 +08:00 |
|
|
|
7b39ce135f
|
Add MULHU instruction
|
2020-08-04 17:06:49 +08:00 |
|
|
|
ee38e3a61d
|
Add MULHSU instruction
|
2020-08-04 17:04:04 +08:00 |
|
|
|
a26813835f
|
Add MULH instruction
|
2020-08-04 17:00:43 +08:00 |
|
|
|
e1bbf567c2
|
Add MUL instruction
|
2020-08-04 16:57:43 +08:00 |
|
|
|
aa47b866a1
|
Add AND instruction
|
2020-08-04 12:54:46 +08:00 |
|
|
|
9429403616
|
Add OR instruction
|
2020-08-04 12:51:48 +08:00 |
|
|
|
a3a9592c19
|
Add SRA instruction
|
2020-08-04 12:47:35 +08:00 |
|
|
|
907f7240bf
|
Add SRL instruction
|
2020-08-04 12:42:39 +08:00 |
|
|
|
0c7c929983
|
Add XOR instruction
|
2020-08-04 12:39:20 +08:00 |
|
|
|
cf9e1c741c
|
Add SLTU instruction
|
2020-08-04 12:37:26 +08:00 |
|
|
|
4d313ed54a
|
Add SLT instruction
|
2020-08-04 12:34:06 +08:00 |
|
|
|
a6a09ac120
|
Add SLL instruction
|
2020-08-04 12:31:36 +08:00 |
|
|
|
67c57c4d7d
|
Add SUB instruction
|
2020-08-04 12:25:12 +08:00 |
|
|
|
aad9a3f2b5
|
Add ADD instruction
|
2020-08-04 12:20:52 +08:00 |
|
|
|
3abdcf07d2
|
Add R-type instruction format
|
2020-08-04 12:06:01 +08:00 |
|
|
|
19099edee3
|
Add SRAI instruction
|
2020-08-03 15:10:58 +08:00 |
|
|
|
eaf475ee04
|
Add SRLI instruction
|
2020-08-03 14:54:02 +08:00 |
|
|
|
0234b65890
|
Add SLLI instruction
|
2020-08-03 14:51:36 +08:00 |
|
|
|
a9cff77a82
|
Add I-type (shift variation) instruction format
|
2020-08-03 14:44:33 +08:00 |
|
|
|
c3821bc885
|
Add SW instruction
|
2020-08-03 14:29:52 +08:00 |
|
|
|
948a3db1c1
|
Add SH instruction
|
2020-08-03 14:27:08 +08:00 |
|
|
|
84454e7048
|
Add SB instruction
|
2020-08-03 14:23:40 +08:00 |
|
|
|
eebb39ee27
|
Add S-type instruction format
|
2020-08-03 14:15:09 +08:00 |
|
|
|
62ae797737
|
Add BGEU instruction
|
2020-08-03 11:33:57 +08:00 |
|
|
|
596d7fcf6d
|
Add BLTU instruction
|
2020-08-03 11:30:16 +08:00 |
|
|
|
f6008f3096
|
Add BGE instruction
|
2020-08-03 10:42:27 +08:00 |
|
|
|
8d1b070a02
|
Add BLT instruction
|
2020-08-03 10:38:54 +08:00 |
|
|
|
680042b9ee
|
ADD BNE instruction
|
2020-08-03 10:33:45 +08:00 |
|
|
|
486c77a108
|
Fix BEQ instruction
|
2020-08-03 10:29:17 +08:00 |
|
|
|
c17ccdf897
|
Add BEQ instruction
|
2020-08-03 10:28:01 +08:00 |
|
|
|
33ecb317b2
|
Add SB-type instruction
|
2020-08-03 10:19:01 +08:00 |
|
|
|
663b0b3b48
|
Add ANDI instruction
|
2020-07-31 16:51:59 +08:00 |
|
|
|
912580dda8
|
Add ORI instruction
|
2020-07-31 16:49:59 +08:00 |
|
|
|
bf80a13d55
|
Add XORI instruction
|
2020-07-31 16:48:00 +08:00 |
|
|
|
e49476746e
|
Add SLTIU instruction
|
2020-07-31 16:45:15 +08:00 |
|
|
|
305d2195be
|
Add SLTI instruction
|
2020-07-31 16:42:29 +08:00 |
|
|
|
a9bc0629bd
|
Add ADDI instruction
|
2020-07-31 16:39:32 +08:00 |
|
|
|
cf8033a8bb
|
Add LHU instruction
|
2020-07-31 16:35:06 +08:00 |
|
|
|
e3f0727e9c
|
Add LBU instruction
|
2020-07-31 16:31:25 +08:00 |
|
|
|
dc31087f73
|
Add LW instruction
|
2020-07-31 16:27:36 +08:00 |
|
|
|
96015ee5d9
|
Add LH instruction
|
2020-07-31 16:19:04 +08:00 |
|
|
|
ecfe8b11c4
|
Fix JALR instruction
|
2020-07-31 16:15:17 +08:00 |
|
|
|
d525a89ccb
|
Add LB instruction
|
2020-07-31 16:14:48 +08:00 |
|
