Add DIV instruction
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7b39ce135f
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2a809073a5
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@ -0,0 +1,23 @@
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from insn_R import *
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class rvfi_insn_div(rvfi_insn_R):
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def __init__(self):
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super(rvfi_insn_div, self).__init__()
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def ports(self):
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return super(rvfi_insn_div, self).ports()
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def elaborate(self, platform):
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m = super(rvfi_insn_div, self).elaborate(platform)
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# DIV instruction
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altops_bitmask = Signal(32)
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m.d.comb += altops_bitmask.eq(0x29bbf66f7f8529ec)
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result = Signal(32)
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m.d.comb += result.eq((self.rvfi_rs1_rdata - self.rvfi_rs2_rdata) ^ altops_bitmask)
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m.d.comb += self.spec_valid.eq(self.rvfi_valid & (~self.insn_padding) & (self.insn_funct7 == 0b0000001) & (self.insn_funct3 == 0b100) & (self.insn_opcode == 0b0110011))
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m.d.comb += self.spec_rs1_addr.eq(self.insn_rs1)
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m.d.comb += self.spec_rs2_addr.eq(self.insn_rs2)
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m.d.comb += self.spec_rd_addr.eq(self.insn_rd)
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m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, result, 0))
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m.d.comb += self.spec_pc_wdata.eq(self.rvfi_pc_rdata + 4)
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return m
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