M-Labs/riscv-formal-nmigen
6
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Update README.md

Browse Source
This commit is contained in:
Donald Sebastian Leung 2020-08-11 14:54:27 +08:00
parent a78309d997
commit 507675b59f
1 changed files with 4 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
insns/README.md
View File

@ -67,6 +67,10 @@ Below is a list of instructions currently supported by this port of the riscv-fo
- `InsnXori`: XORI instruction
- `InsnOri`: ORI instruction
- `InsnAndi`: ANDI instruction
- `InsnRV32ISType`: RV32I S-Type Instruction
- `InsnSb`: SB instruction
- `InsnSh`: SH instruction
- `InsnSw`: SW instruction
## Parameters