History

Donald Sebastian Leung d106ceede7 Add XOR instruction		2020-08-07 15:35:40 +08:00
..
Insn.py	Add generic instruction class	2020-08-07 12:28:52 +08:00
InsnAdd.py	Add ADD instruction	2020-08-07 13:54:00 +08:00
InsnRV32IRType.py	Add RV32I R-Type Instruction	2020-08-07 13:45:35 +08:00
InsnSll.py	Add SLL instruction	2020-08-07 15:25:05 +08:00
InsnSlt.py	Add SLT instruction	2020-08-07 15:29:54 +08:00
InsnSltu.py	Add SLTU instruction	2020-08-07 15:33:18 +08:00
InsnSub.py	Add SUB instruction	2020-08-07 14:00:12 +08:00
InsnXor.py	Add XOR instruction	2020-08-07 15:35:40 +08:00
README.md	Update insns/README.md	2020-08-07 12:54:31 +08:00

RISC-V Supported Instructions

Instructions

Instruction type	Instructions
R-type	ADD, ADDW, AND, DIV, DIVU, DIVUW, DIVW, MUL, MULH, MULHSU, MULHU, MULW, OR, REM, REMU, REMUW, REMW, SLL, SLLW, SLT, SLTU, SRA, SRAW, SRL, SRLW, SUB, SUBW, XOR
I-type	ADDI, ADDIW, ANDI, JALR, LB, LBU, LD, LH, LHU, LW, LWU, ORI, SLTI, SLTIU, XORI
I-type (shift variation)	SLLI, SLLIW, SRAI, SRAIW, SRLI, SRLIW
S-type	SB, SD, SH, SW
SB-type	BEQ, BGE, BGEU, BLT, BLTU, BNE
U-type	AUIPC, LUI
UJ-type	JAL
CI-type	C_ADD, C_ADDI, C_ADDIW, C_JALR, C_JR, C_LI, C_MV
CI-type (SP variation)	C_ADDI16SP
CI-type (ANDI variation)	C_ANDI
CI-type (LSP variation, 32 bit version)	C_LWSP
CI-type (LSP variation, 64 bit version)	C_LDSP
CI-type (LUI variation)	C_LUI
CI-type (SLI variation)	C_SLLI
CI-type (SRI variation)	C_SRAI, C_SRLI
CIW-type	C_ADDI4SPN
CS-type (ALU version)	C_ADDW, C_AND, C_OR, C_SUB, C_SUBW, C_XOR
CS-type (32 bit version)	C_SW
CS-type (64 bit version)	C_SD
CSS-type (32 bit version)	C_SWSP
CSS-type (64 bit version)	C_SDSP
CB-type	C_BEQZ, C_BNEZ
CJ-type	C_J, C_JAL
CL-type (32 bit version)	C_LW
CL-type (64 bit version)	C_LD

Note: This section is under development and will be updated as more classes are implemented.

TODO