Add SLTI instruction
This commit is contained in:
parent
a9bc0629bd
commit
305d2195be
20
insns/insn_slti.py
Normal file
20
insns/insn_slti.py
Normal file
@ -0,0 +1,20 @@
|
||||
from insn_I import *
|
||||
|
||||
class rvfi_insn_slti(rvfi_insn_I):
|
||||
def __init__(self):
|
||||
super(rvfi_insn_slti, self).__init__()
|
||||
def ports(self):
|
||||
return super(rvfi_insn_slti, self).ports()
|
||||
def elaborate(self, platform):
|
||||
m = super(rvfi_insn_slti, self).elaborate(platform)
|
||||
|
||||
# SLTI instruction
|
||||
result = Signal(32)
|
||||
m.d.comb += result.eq(Value.as_signed(self.rvfi_rs1_rdata) < Value.as_signed(self.insn_imm))
|
||||
m.d.comb += self.spec_valid.eq(self.rvfi_valid & (~self.insn_padding) & (self.insn_funct3 == 0b010) & (self.insn_opcode == 0b0010011))
|
||||
m.d.comb += self.spec_rs1_addr.eq(self.insn_rs1)
|
||||
m.d.comb += self.spec_rd_addr.eq(self.insn_rd)
|
||||
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, result, 0))
|
||||
m.d.comb += self.spec_pc_wdata.eq(self.rvfi_pc_rdata + 4)
|
||||
|
||||
return m
|
Loading…
Reference in New Issue
Block a user