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riscv-formal-nmigen
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Add SW instruction

pull/2/head
Donald Sebastian Leung 2020-08-11 14:52:59 +08:00
parent ec86b3a76a
commit a78309d997
1 changed files with 9 additions and 0 deletions
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insns/InsnSw.py Normal file
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@ -0,0 +1,9 @@
from InsnRV32ISType import *
"""
SW instruction
"""
class InshSw(InsnRV32ISType):
def __init__(self, RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, RISCV_FORMAL_COMPRESSED, RISCV_FORMAL_ALIGNED_MEM):
super().__init__(RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, RISCV_FORMAL_COMPRESSED, RISCV_FORMAL_ALIGNED_MEM, 0b010, 4)