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Commit Graph

1388 Commits

Author SHA1 Message Date
05dd11a60d protocols/pyon: support numpy scalars (closes #53) 2015-07-25 12:28:56 +08:00
8bc1dd9f9c test/serialization: remove redundant test since Quantity was removed 2015-07-25 12:23:43 +08:00
9fe65769f2 gui: add console description 2015-07-25 12:01:47 +08:00
whitequark
692791f0bd Make sure a landing pad returns {i8*} to soothe LLVM codegen. 2015-07-25 07:01:25 +03:00
5979f85c1c gui: use monospace font in log 2015-07-25 11:38:26 +08:00
whitequark
ece52062f2 Implement code generation for exception handling. 2015-07-25 05:37:37 +03:00
ef8b09d9bc gui: add console 2015-07-25 00:36:16 +08:00
928775f6ac gui: fix default LinearScan/RandomScan 2015-07-25 00:35:21 +08:00
5b62b2452d gui: get spinboxes to behave 2015-07-25 00:32:18 +08:00
7d81520827 protocols/pc_rpc: improve docstrings 2015-07-25 00:30:36 +08:00
whitequark
c581af29d7 Merge remote-tracking branch 'origin/master' into new-py2llvm 2015-07-23 21:36:17 +03:00
6b0e120d75 wavesynth/Synthesizer: allow empty data 2015-07-23 12:34:54 -06:00
5b1165f413 gui: log autoscroll 2015-07-24 00:11:05 +08:00
1a4028ca92 gui: better log lookandfeel 2015-07-24 00:08:14 +08:00
3a06e22b67 master: handle logging while scanning repository 2015-07-23 23:06:15 +08:00
aa2acb9137 gui: auto resize of table columns 2015-07-23 22:36:52 +08:00
whitequark
20f5f8217d Make sure tests pass both on ARTIQ Python and CPython.
In some cases (the `is` operator and wraparound arithmetics)
the tests will only pass on ARTIQ Python. These are conditionally
commented out.
2015-07-23 08:09:25 +03:00
whitequark
65121b437f Rework internal logic of slices. 2015-07-23 07:57:49 +03:00
whitequark
2b9ac344d8 Verify LLVM module in compiler.textbench.jit. 2015-07-23 07:57:35 +03:00
whitequark
9db199cad9 Handle closure effects appropriately in LocalAccessValidator. 2015-07-23 03:15:36 +03:00
whitequark
acb8810e62 Add tests for lambdas and functions. 2015-07-23 03:07:30 +03:00
whitequark
f8c2709943 Make division by zero raise an exception. 2015-07-23 01:26:50 +03:00
whitequark
4cfe4ea148 Make negative and too-far shifts have defined behavior. 2015-07-23 00:58:41 +03:00
whitequark
bf60978c7b Add bool coercion support. 2015-07-22 19:15:54 +03:00
whitequark
de181e0cb9 Revert "Require boolean operand in BoolOp."
This reverts commit 5d518dcec6.
2015-07-22 18:35:18 +03:00
whitequark
51aef980a0 Revert "Require boolean condition in If, While, IfExp."
This reverts commit e21829ce74.
2015-07-22 18:35:14 +03:00
whitequark
f2a6110cc4 Add integration tests for every language construct. 2015-07-22 18:34:52 +03:00
0b10f72c2b Merge branch 'master' of https://github.com/m-labs/artiq 2015-07-22 10:44:49 +08:00
whitequark
dff4ce7e3a Return LLVM IR module from LLVMIRGenerator.process. 2015-07-22 04:13:04 +03:00
whitequark
986d9d944f Add artiq.compiler.testbench.run. 2015-07-22 04:10:15 +03:00
whitequark
86e006830c Use the correct printf format for 64-bit integers. 2015-07-22 03:05:15 +03:00
whitequark
236d5b886a Add support for Assert. 2015-07-22 02:58:59 +03:00
073e09ed36 gui: common format for results/params 2015-07-22 06:01:09 +08:00
bd2bd68a54 gui,client: do now show arguments 2015-07-22 05:47:14 +08:00
8402f1cdcd master,gui: basic log support 2015-07-22 05:13:50 +08:00
e247fb5415 gui/tools: add ListSyncModel 2015-07-22 05:13:46 +08:00
whitequark
5d518dcec6 Require boolean operand in BoolOp. 2015-07-21 23:46:22 +03:00
whitequark
e21829ce74 Require boolean condition in If, While, IfExp. 2015-07-21 23:39:22 +03:00
whitequark
1e851adf4f Add a polymorphic print function. 2015-07-21 22:32:10 +03:00
179ca36d09 gui: basic scan support 2015-07-21 21:24:24 +02:00
whitequark
0e7294db8d Null-terminate all string literals. 2015-07-21 19:57:18 +03:00
whitequark
9d20080624 Use internal linkage for interior Python global values. 2015-07-21 19:55:43 +03:00
whitequark
8c9d9cb5a1 Make compiler.testbench.llvmgen emit a main() function. 2015-07-21 19:48:44 +03:00
whitequark
7301a76d68 Mark string constants as unnamed_addr.
As a result they will be merged when possible.
2015-07-21 17:10:31 +03:00
whitequark
49ece6a12a Add support for string literals. 2015-07-21 14:27:48 +03:00
whitequark
64d2604aa8 Tolerate assertion failures in tests when looking for diagnostics. 2015-07-21 14:12:27 +03:00
whitequark
ec9d40b04f Add LLVM IR generation for function calls. 2015-07-21 13:45:27 +03:00
whitequark
e299801c0f LocalAccessValidator: fix validation of closures with no outer variables. 2015-07-21 13:16:18 +03:00
whitequark
6f11fa6bb1 Add conversion to LLVM IR (except handling of exception handling). 2015-07-21 04:55:01 +03:00
47191eda91 dds monitor: relax timing (for pipistrello) 2015-07-19 21:36:51 -06:00
1a0dc499dd gui: exit when main window is closed 2015-07-19 18:27:41 +02:00
bb05ed268e language/scan: add argument processor 2015-07-19 16:47:35 +02:00
whitequark
c6cd318f19 Fix artiq.compiler.ir.BasicBlock.__repr__. 2015-07-19 16:32:33 +03:00
937ca853aa language/scan: fix random scan, add explicit scan, specify what runs on host/device 2015-07-19 11:36:52 +02:00
whitequark
7e3f91c0bb Teach closures to LocalAccessValidator. 2015-07-19 12:08:26 +03:00
whitequark
2c010b10ee Remove UnaryOp ARTIQ IR instruction; rename BinaryOp to Arith.
Everything it can express can also be expressed via Arith.
2015-07-19 11:51:53 +03:00
whitequark
ac491fae47 Add LocalAccessValidator. 2015-07-19 11:44:51 +03:00
whitequark
adf18bb042 Fix assignment to tuples in IRGenerator. 2015-07-19 10:31:11 +03:00
whitequark
4bd83fb43d Use ".k" instead of "k" for the finalizer continuation variable.
The dot signifies that this is an internal variable and it
does not need to be tracked as if it was a user-defined one.
2015-07-19 10:30:42 +03:00
whitequark
8eedb3bc44 Fix IRGenerator.append(loc=...). 2015-07-19 10:29:33 +03:00
whitequark
f212ec0263 Add a trivial dead code elimination transform.
Its purpose is to sweep up basic blocks with no predecessors,
which are annoying to handle explicitly elsewhere.
2015-07-19 10:29:14 +03:00
whitequark
603d49dffa Add a dominator analysis. 2015-07-18 20:48:52 +03:00
whitequark
224a93fde3 Make compiler.ir.BasicBlock.predecessors much faster. 2015-07-18 20:48:11 +03:00
deaa492566 language: add scan iterators 2015-07-18 19:26:41 +02:00
9e29a4650a environment,gui: more argument types 2015-07-18 16:25:08 +02:00
5f95a302e6 environment: improve docstrings 2015-07-18 16:24:37 +02:00
657f198cdc gui: display '---' on failed number result 2015-07-18 10:26:47 +02:00
whitequark
47cbadb564 Revert "Ensure bindings are created in correct order for e.g. "x, y = y, x"."
This reverts commit bcd1832203.

The bindings are actually created in lexical order, as evident
in e.g. "x = lambda: x". The safety provided by this check should
be instead provided by a local access analysis.
2015-07-18 09:54:11 +03:00
whitequark
8e1cc8d985 Add an explicit ARTIQ IR instruction to create a closure. 2015-07-18 09:27:34 +03:00
whitequark
5ad02d5282 Fix ARTIQ IR generation for variables declared global. 2015-07-18 09:10:41 +03:00
whitequark
21eafefd28 Fix inference for globals. 2015-07-18 08:13:49 +03:00
whitequark
0d66bdfbf8 Fix For miscompilation. 2015-07-18 07:58:43 +03:00
whitequark
dde2e67c3f Add source locations to ARTIQ IR instructions. 2015-07-18 07:49:42 +03:00
whitequark
255ffec483 Generate more compact ARTIQ IR for else-less if. 2015-07-18 07:49:27 +03:00
dd7920f0c3 gui: basic argument support 2015-07-17 21:28:46 +02:00
whitequark
e96bc3c36c Add complete IR generator. 2015-07-17 21:29:06 +03:00
2576036ba1 language,worker: preserve order of arguments 2015-07-17 19:32:38 +02:00
6b36d93cc2 master,client: support repository rescan 2015-07-17 18:55:48 +02:00
4907991ea3 sync_struct: docstring cleanup 2015-07-17 18:53:43 +02:00
whitequark
f28549a11a Add builtins.is_exception. 2015-07-17 16:05:02 +03:00
whitequark
3b661b2b65 Fix environment corruption by ExceptHandler without a name. 2015-07-17 16:04:46 +03:00
39c6bc940c coreconfig: use new database API (closes #75) 2015-07-17 10:49:55 +02:00
9649e1837a gui: basic plotting 2015-07-16 20:52:53 +02:00
a83473a19a sync_struct: clarify notify_cb doc 2015-07-16 20:52:27 +02:00
whitequark
2dcb744519 Fix inference for default arguments. 2015-07-16 17:26:31 +03:00
whitequark
f8e51e07d5 Add zero/one accessors to TBool, TInt, TFloat. 2015-07-16 16:03:24 +03:00
whitequark
bcd1832203 Ensure bindings are created in correct order for e.g. "x, y = y, x". 2015-07-16 15:59:59 +03:00
whitequark
5756cfcebc Correctly infer type of list(iterable). 2015-07-16 15:35:46 +03:00
whitequark
6cda67c0c6 Ensure type comparisons see through type variables. 2015-07-16 14:59:05 +03:00
whitequark
c1e7a82e97 Add IndexError and ValueError builtins. 2015-07-16 14:58:40 +03:00
whitequark
b58fa9067d Add attributes to TRange.
Also make attributes an OrderedDict, for stable order during
LLVM IR generation.
2015-07-16 14:57:44 +03:00
whitequark
a6950bf11d Move builtin.is_{builtin,exn_constructor} to types. 2015-07-16 14:56:39 +03:00
whitequark
5000f87dfc Rename the field of CoerceT from expr to value. 2015-07-16 14:55:23 +03:00
whitequark
e9416f4707 Convert Slice into typed SliceT. 2015-07-16 14:54:04 +03:00
whitequark
53fb03d1bf Restrict comprehensions to single for and no if clauses. 2015-07-16 14:52:41 +03:00
whitequark
227f97f8a3 Add inference for Index, Slice and ExtSlice. 2015-07-16 04:22:41 +03:00
66940ea815 rtio: disable NOP suppression after reset and underflow 2015-07-15 20:54:55 +02:00
f836465585 coredevice: environment -> runtime 2015-07-15 11:20:41 +02:00
84de2fb28b expid: experiment -> class_name 2015-07-15 11:08:12 +02:00
255aba9247 test/worker: remove stale handler 2015-07-15 11:07:48 +02:00
7de56666e3 worker,environment: support scanning of arguments with no default 2015-07-15 10:59:48 +02:00
9ed4dcd7d1 repository: load experiments in worker, list arguments 2015-07-15 10:54:44 +02:00
whitequark
c724e024ce Fix inference for multiple-target assignments. 2015-07-15 06:33:44 +03:00
7770ab64f2 worker: factor timeouts 2015-07-14 23:43:08 +02:00
whitequark
9ff9f85f19 Add accessors to instructions. 2015-07-14 22:18:38 +03:00
e20b260117 gui: fix selections 2015-07-14 19:08:08 +02:00
21e8596d8c gui: RT results overview 2015-07-14 17:31:18 +02:00
55cd41444e gui/DictSync: better support of nested structs 2015-07-14 17:30:55 +02:00
1edeb5a13f sync_struct: docstring cleanup 2015-07-14 17:30:21 +02:00
84e7f55df3 gui: fix DDS class recognition 2015-07-14 17:28:26 +02:00
Yann Sionneau
6e3fd591f7 gui: remove unnecessary QSplitter 2015-07-14 16:59:04 +02:00
whitequark
bdcb24108b Add basic IR generator. 2015-07-14 08:56:51 +03:00
whitequark
f417ef31a4 Make binop coercion look through CoerceT nodes.
This fixes inference for "x = 1 + 1" after int monomorphization.
2015-07-14 06:42:09 +03:00
Yann Sionneau
90ba9f7bbf llvmlite: rename our package to be llvmlite_or1k to avoid collision with llvmlite package needed for numba 2015-07-14 01:01:56 +02:00
56fc7a484c TTLInOut: timestamp -> timestamp_mu 2015-07-13 23:21:29 +02:00
820ff2da2c test/coredevice: WA for lack of constant string support in compiler (see issue #68) 2015-07-13 22:22:26 +02:00
32d141f5ac refactor ddb/pdb/rdb 2015-07-13 22:21:32 +02:00
whitequark
ebe243f8d9 Add printing of SSA functions. 2015-07-13 21:08:20 +03:00
whitequark
dbdd45acc5 Add missing return. 2015-07-13 20:52:55 +03:00
whitequark
7c9afcce85 Fix Python default argument fiasco. 2015-07-13 20:52:48 +03:00
8b02b58a77 sync_struct/Notifier: do not pass root param to publish 2015-07-13 17:12:59 +02:00
0e92cfe053 artiq_run: remove support for stale watchdog API 2015-07-11 22:26:37 +02:00
whitequark
7c52910dc5 Add a basic SSA IR. 2015-07-11 18:46:37 +03:00
80eea4ce6c test: relax test_time_keeps_running
on pipistrello this takes about 200-250ms
2015-07-09 16:30:37 -06:00
9d4073ef36 master: remove simple parameter history 2015-07-09 13:54:38 +02:00
96a5d73c81 worker: split build stage from prepare 2015-07-09 13:18:12 +02:00
34aacd3c5f complete AD9914 support (no programmable modulus, untested) 2015-07-08 17:22:43 +02:00
Yann Sionneau
0109821078 tools: change asyncio_process_wait_timeout to handle cases where process.stdout is None. close #56 2015-07-07 19:30:36 +02:00
Yann Sionneau
2d343dd95d pc_rpc: AsyncioClient __do_rpc coroutine was never yielded from 2015-07-07 19:26:47 +02:00
f3e5197c14 test/coredevice/test_time_keeps_running: remove unnecessary close_devices, upper bound 2015-07-07 15:48:47 +02:00
Yann Sionneau
706bf2b4b4 pxi6733: allow usage of 2-dimensional arrays. close #66 2015-07-07 15:42:08 +02:00
8a33d8c868 never stop RTIO counter 2015-07-07 15:29:38 +02:00
Yann Sionneau
df232f5405 lda driver: add error message when no device found 2015-07-07 15:18:28 +02:00
f9d878119a pxi6733: add mediator 2015-07-05 19:07:57 +02:00
2bc8286f3f pdq2/mediator: fix arm 2015-07-05 19:07:31 +02:00
58c0150822 ttl: improve clockgen doc 2015-07-05 19:07:13 +02:00
2eeaa3b9be pxi6733: clean up docstring 2015-07-05 18:50:16 +02:00
a3fe538067 test: fix get_from_ddb 2015-07-04 22:36:23 -06:00
409c66e966 test: convert lda/tcube/409b to hardware_testbench 2015-07-04 21:44:28 -06:00
6faa8ecd51 test: split full_stack into coredevice and coredevice_vs_host
also adapt it to hardware_testbench
closes: #62
2015-07-04 20:35:02 -06:00
4cbf280f1a test: return experiment not, rdb 2015-07-04 20:05:11 -06:00
00b9368a0c language/core: add EncodedException to __all_ 2015-07-04 19:51:30 -06:00
380f498284 Merge branch 'namespace_all'
* namespace_all:
  use __all__ to structure the namespace
2015-07-04 18:38:26 -06:00
65ec6c28f4 ttl/clockgen: expose acc_width 2015-07-04 19:21:25 +02:00
abd58667b9 pxi6733: small cleanup 2015-07-04 18:49:09 +02:00
504576de58 remove unneeded import 2015-07-04 18:43:07 +02:00
753d61b38f complete support for TTL clock generator 2015-07-04 18:36:01 +02:00
a615a3830a test/coredevice: minor fixes 2015-07-04 18:35:11 +02:00
whitequark
549c110e7c Fix types.TFunction.fold. 2015-07-04 04:27:24 +03:00
whitequark
4785f0a2de Don't error out in inferencer if builtin arguments have polymorphic types. 2015-07-04 04:27:15 +03:00
whitequark
16432d2652 Implement escape analysis. 2015-07-04 04:16:37 +03:00
whitequark
4358c5c453 Unbreak return type inference. 2015-07-04 02:23:55 +03:00
whitequark
561d403ddd Add missing _loc forwarding. 2015-07-04 00:59:03 +03:00
whitequark
ee0990cb5e Automatically infer return type of NoneType for no return statements. 2015-07-04 00:58:48 +03:00
2674ed1d2d use __all__ to structure the namespace 2015-07-02 22:02:21 -06:00
whitequark
bfabca494b Remove regions from types.
Unification-based inference for regions is useful with a language
that has let bindings (which would propagate the regions) and
functions polymorphic over regions. For reasons of simplicity,
ARTIQ has neither, and making unification-based inference work would
essentially mean adding region coercions between most AST nodes,
and having every source subexpression have its own region variable,
with the appropriate subtyping relationship.

It's simpler to just keep that state outside of typedtree.
2015-07-02 22:55:12 +03:00
whitequark
0ae13ac1b9 Style fixes. 2015-07-02 22:38:55 +03:00
whitequark
7c833f0727 Move transforms.MonomorphismChecker to validators.MonomorphismValidator. 2015-07-02 21:54:31 +03:00
whitequark
02b41ea0f7 Add MonomorphismChecker. 2015-07-02 21:28:26 +03:00
whitequark
73a8f3c442 Fix tests. 2015-07-02 20:06:43 +03:00
whitequark
8a65266f14 Improve builtin call error message. 2015-07-02 20:06:07 +03:00
whitequark
196acb37f6 Add IntMonomorphizer. 2015-07-02 19:57:27 +03:00
whitequark
7ce9bdf54d Move transforms to artiq.compiler.transforms, add artiq.Module. 2015-07-02 19:35:35 +03:00
2881d5f00a gateware: add RTIO clock generator 2015-07-02 18:20:26 +02:00
whitequark
1702251ee5 Add region field to types. 2015-07-02 18:44:09 +03:00
whitequark
86cdc84f7e Initialize types.TBuiltin's attributes field. 2015-07-02 18:19:01 +03:00
74f07092c7 test/coredevice: fix timestamp conflict 2015-07-02 10:26:00 +02:00
771ad6cb26 test/coredevice: adapt to MU API 2015-07-01 22:34:49 +02:00
5ace0f8e7a Merge branch 'master' of https://github.com/m-labs/artiq 2015-07-01 22:23:10 +02:00
9d6287a6a3 expose machine units to user 2015-07-01 22:22:53 +02:00
Yann Sionneau
d7ef885d9e controllers: print+exit instead of raising exception for argparse error, better doc for --simulation
As long as you use --simulation, the driver will be in simulation mode.
Even if you specify a --device or --channels.

That can allow you to just switch to simulation mode by adding
--simulation in the device database without having to
remove the serial number or device path/name.
2015-07-01 11:54:28 +02:00
Yann Sionneau
652f3359a2 lda_controller: fix typo 2015-07-01 11:41:01 +02:00
Yann Sionneau
ffe1355b1a lda_controller: improve help message for --device argument 2015-06-29 19:24:55 +02:00
Yann Sionneau
a73776bd72 controllers: enforce the usage of either --simulation or --device 2015-06-29 19:21:32 +02:00
whitequark
6bf95397d7 Rename package py2llvm to compiler.
Since the package implements a typechecker along with a code generator,
and the typechecker will be run before or together with transformations,
this name is more descriptive.
2015-06-29 20:15:22 +03:00
Yann Sionneau
515aa96819 controllers: use --simulation for simulation 2015-06-29 13:04:01 +02:00
23eee94458 pipistrello: add notes to nist_qc1 about dds_clock
* remove xtrig from the target as it is not usually connected (used for
  dds_clock) and ignore PMT2/BTN2 as C:15 is used for dds_clock.
* this also aligns the ttl channel numbers with kc705/nist_qc1 (two pmt
  inputs followed by 16 ttl outputs followed by leds)
2015-06-28 20:56:12 -06:00
f7427dda39 test: make benchmarks unittest 2015-06-28 20:56:12 -06:00
593dafc118 test: hardware testbench 2015-06-28 20:55:59 -06:00
39e9e73ff3 language: allow experiments to import from artiq.language
this way the import stanza shows what is imported: just experiment language
related components

keep the imports also at top level until experiments have transitioned

the top level __init__.py should build and expose the entire namespace of artiq
related things, like hdf5 analysis tools, frontend components (like experiment
running api), deployment tools etc.
2015-06-28 20:52:41 -06:00
whitequark
f430bf3f63 Add support for exceptions. 2015-06-29 00:35:48 +03:00
whitequark
a4a9cd884e Add exception constructor types. 2015-06-28 22:48:15 +03:00
whitequark
9044e88983 Elaborate hierarchy of builtins. 2015-06-28 22:40:57 +03:00
944bfafefa soc: support QC2 and AD9914 (untested) 2015-06-28 21:37:27 +02:00
85c5b157a0 test/full_stack: tolerate FP rounding errors 2015-06-27 23:52:20 +02:00
7d3acf4d10 Merge branch 'master' of https://github.com/m-labs/artiq 2015-06-27 21:15:24 +02:00
07ceed9512 artiq_flash.sh: back down on verbosity 2015-06-26 11:09:26 -06:00
whitequark
ea0d11b8be Allow also passing iterables to lists. 2015-06-26 19:14:24 +03:00
whitequark
e07057c224 Add range types. 2015-06-26 18:53:20 +03:00
whitequark
71256a7109 Assignment rhs is typed before lhs. 2015-06-26 18:35:34 +03:00
c71fe29792 simplify unit system and use floats by default 2015-06-26 16:34:37 +02:00
e6a4c2fb36 dds: make it easier to specify phase 2015-06-26 12:05:11 +02:00
whitequark
7cd6011981 Add typechecking for most builtin. 2015-06-26 11:16:08 +03:00
48e0a2ad37 artiq_flash: echo commands for a bit more verbosity 2015-06-25 13:28:05 -06:00
Yann Sionneau
9c96ebf7d4 nist_qc2: add fmc adapter io file 2015-06-25 03:06:15 +02:00
whitequark
752031147d Add valid forms for builtin calls. 2015-06-24 12:16:17 +03:00
whitequark
4d407ace4b Implement prelude. 2015-06-24 11:46:15 +03:00
whitequark
710a04cbee Add builtin definitions for len(), round(), range() and syscall(). 2015-06-24 11:28:24 +03:00
whitequark
8762729e80 Add types.TBuiltin. 2015-06-24 11:24:35 +03:00
4ba8951ae1 rpc: fix indentation of class docstring 2015-06-23 19:31:52 +00:00
Yann Sionneau
71721a152e artiq_rpctool: list-methods also prints class docstring 2015-06-23 18:35:32 +02:00
8082bf14c1 Merge branch 'master' of https://github.com/m-labs/artiq 2015-06-21 07:27:47 -06:00
ef96de7d26 Merge branch 'shrink-dds-wb'
* shrink-dds-wb:
  ad9858: make wb data 8 bit wide
2015-06-21 00:10:44 -06:00
45ec5dbe84 ad9858: make wb data 8 bit wide
matches actual dds bus data width and saves bram
2015-06-20 23:53:01 -06:00
07a58dc0da wavesynth: cleanup, refactor 2015-06-20 23:29:26 -06:00
87ea1433d3 dds: all working 2015-06-20 18:42:39 -06:00
827f99e7d3 gui: more digits in DDS monitor 2015-06-19 17:55:01 -06:00
f47c2e54e1 DDS monitor fixes 2015-06-19 17:36:46 -06:00
Joe Britton
83fd5fdf16 novatech409b: add unit test 2015-06-19 15:59:23 -06:00
Joe Britton
f850336537 novatech409b: cleanup 2015-06-19 15:58:25 -06:00
5a9bdb2e33 DDS monitoring 2015-06-19 15:30:17 -06:00
Yann Sionneau
b8bb3d8ca7 manual: explain how to select TCube device from serial number 2015-06-19 17:06:50 +02:00
Yann Sionneau
4cdf1c4b81 manual: serial number explanations + udev rule for LDA 2015-06-19 16:41:44 +02:00
Yann Sionneau
988ec5c7e2 tdc/tpz driver: fix missing close method in simulated device 2015-06-19 10:40:49 +02:00
Yann Sionneau
645c65014d gui: forgot to rename one data to backing_store 2015-06-19 01:07:37 +02:00
Yann Sionneau
4d077f50c6 thorlabs tdc driver: all moves are now blocking and wait for move to end or be stopped 2015-06-19 01:02:12 +02:00
Yann Sionneau
b05972059e artiq_gui: check due date upon date selection 2015-06-18 20:44:42 +02:00
Yann Sionneau
1ad5165cc7 artiq_gui: add a search box in parameters dock 2015-06-18 20:43:53 +02:00
Yann Sionneau
77ca8bbf0f artiq_coreconfig: better arg parsing 2015-06-18 17:07:20 +02:00
Florent Kermarrec
d25a07f668 Merge branch 'master' of https://github.com/m-labs/artiq 2015-06-18 12:54:33 +02:00
Florent Kermarrec
38a0f63bd2 gateware/soc: use Minicon SDRAM controller and 128KB shared L2 cache 2015-06-18 12:18:03 +02:00
Yann Sionneau
afc70926d7 artiq_coreconfig: use subparsers for arg parsing 2015-06-17 16:40:27 +02:00
Yann Sionneau
95ff21d829 gui: add ARTIQ icon 2015-06-16 17:01:53 +02:00
Yann Sionneau
4c8917afbd artiq_flash: use BIT files instead of BIN files 2015-06-16 01:39:41 +02:00
whitequark
3adb4150f4 Fix type of Call. 2015-06-15 17:16:44 +03:00
whitequark
8c5e58f83c Implement Call. 2015-06-15 16:55:13 +03:00
whitequark
a3789868f2 More friendly artiq.py2llvm.typing testbench. 2015-06-15 15:59:36 +03:00
whitequark
20e0e69358 Add support for function types and LambdaT.
Also fix scoping of Nonlocal.
2015-06-15 11:30:50 +03:00
whitequark
dbfdbc3c22 Add check for duplicate parameter names. 2015-06-15 09:05:24 +03:00
whitequark
d27bb3168d Add support for ListComp. 2015-06-15 08:40:37 +03:00
76e034c913 protocols: add fire-and-forget RPC 2015-06-14 22:03:34 -06:00
whitequark
77adf2f6b5 Add support for With. 2015-06-14 23:13:41 +03:00
whitequark
cd22b8178c Add support for Raise. 2015-06-14 23:02:28 +03:00
whitequark
20b7a73b49 Add support for Compare. 2015-06-14 22:48:04 +03:00
whitequark
fe69c5b465 Implement BinOp coercion rules for AugAssign. 2015-06-14 13:10:32 +03:00
whitequark
7b78e7de67 Add support for BinOp. 2015-06-14 12:07:13 +03:00
whitequark
faaf189961 Add support for Attribute. 2015-06-13 13:50:56 +03:00
whitequark
23f33d7239 Invert operand should be integer. 2015-06-13 13:45:09 +03:00
whitequark
1c48874a2a Documentation. 2015-06-13 13:08:16 +03:00
whitequark
de6dff94cd GeneratorExp also includes assignment context. 2015-06-13 12:58:45 +03:00
whitequark
4b4805265d Add support for Break and Continue. 2015-06-13 12:10:30 +03:00
whitequark
55551714fa Error out on unsupported statements. 2015-06-13 11:33:38 +03:00
whitequark
4c95647162 Split ASTTypedRewriter off Inferencer. 2015-06-13 11:33:03 +03:00
whitequark
61434a8da3 Split off builtins from types.
builtins will contain attribute definitions as well.
2015-06-13 10:29:26 +03:00
whitequark
3e2d104014 Make typing.Inferencer idempotent. 2015-06-13 09:32:53 +03:00
86fbe38371 gui: DDS monitor/injection (WIP) 2015-06-12 17:41:04 +08:00
whitequark
c89bf6fae0 Add support for UnaryOp. 2015-06-12 08:59:41 +03:00
f84c51fed5 gui: do not use broken pyqtgraph addLabel method 2015-06-11 15:15:13 +08:00
whitequark
df686136f1 Separate inference and asttyped transformation.
This allows to run inference several times on the same tree,
as would be necessary when coercion nodes are added.
2015-06-11 06:34:26 +03:00
whitequark
e18ea0daae Better error reporting for List. 2015-06-11 04:36:52 +03:00
whitequark
4b7d4c2425 Add support for BoolOp. 2015-06-11 04:36:51 +03:00
whitequark
b8ce3f85bd Refactor error reporting in _unify to factor out custom notes. 2015-06-11 04:36:28 +03:00
whitequark
ba9a7d087d Add support for IfExp. 2015-06-11 04:36:03 +03:00
whitequark
9953302cb6 Move old py2llvm code to artiq/py2llvm_old. 2015-06-11 02:58:29 +03:00
Yann Sionneau
92999d0cc0 sync_struct: test append, insert, delitem and pop actions 2015-06-10 00:52:46 +02:00
276a1784ef gui: add TTL override label 2015-06-09 20:05:39 +08:00
b2af0f6cc3 soc,runtime: support TTL override 2015-06-09 19:51:02 +08:00
Yann Sionneau
6c094b500d pxi6733: fix type issue 2015-06-08 17:56:44 +02:00
Yann Sionneau
d66117ed99 pxi6733: cleanup 2015-06-08 11:54:39 +02:00
whitequark
159692339d Add tests for all diagnostics and unifications. 2015-06-06 18:05:06 +03:00
whitequark
a8ff9d0152 AugAssign does not create a binding. 2015-06-06 17:55:04 +03:00
whitequark
98fe152159 Add lit-based tests for diagnostics. 2015-06-06 17:15:06 +03:00
whitequark
7f77632f1a Add lit-based tests for type inferencer. 2015-06-06 16:58:23 +03:00
whitequark
5f06c6af10 Add support for Return. 2015-06-06 15:12:56 +03:00
whitequark
d08598fa0f Add support for NameConstant. 2015-06-06 15:12:40 +03:00
Yann Sionneau
c251601204 pxi6733: refactor, allow multiple channels in one task, cancel any previous task 2015-06-05 20:12:46 +02:00
26e737f61f style 2015-06-06 00:55:36 +08:00
37c7ea31c3 gui: TTL override support 2015-06-06 00:03:30 +08:00
14cf244c0a gui: display status of TTL channels 2015-06-05 19:11:41 +08:00
whitequark
eb76f594a0 Replace single-quoted strings with double-quoted. 2015-06-05 12:04:27 +03:00
9f9079589e gui: send monitor requests to core device 2015-06-05 14:52:41 +08:00
a6a476593e worker: wait for process termination
This prevents stray SIGCHLDs from crashing the program e.g. if the asyncio event loop is closed before the process actually terminates.
2015-06-05 00:37:26 +08:00
c843c353d7 worker: remove useless process wait 2015-06-05 00:05:38 +08:00
whitequark
6c3b5a95ee Use proper format function. 2015-06-04 17:53:38 +03:00
whitequark
4b01e604db Make unification reflective. 2015-06-04 14:50:32 +03:00
whitequark
1a08b50f0a Use a single type printer for inference errors.
This way, type variable names will be consistent among all
printed diagnostics.
2015-06-04 14:50:32 +03:00
whitequark
c9623a106e Error out on unsupported expressions by default. 2015-06-04 14:50:32 +03:00
Yann Sionneau
50a6da994e worker test: do not close the event loop twice 2015-06-04 13:44:07 +02:00
whitequark
10a269d77e Better error message for List inference. 2015-06-04 14:42:45 +03:00
Yann Sionneau
60bdf74137 tests: use try/finally to close event loop + wait for process to die after killing it 2015-06-04 13:40:13 +02:00
whitequark
995d84d4ee Add inferencing for Tuple, List, For. 2015-06-04 14:13:49 +03:00
whitequark
76ce364fea Implement inferencing for AugAssign. 2015-06-04 11:52:15 +03:00
78f9268277 worker: add note about correct use of close() 2015-06-04 11:30:34 +08:00
d73006652b test/worker: always close even if prepare() raises 2015-06-04 11:22:03 +08:00
82a2beaa32 style fixes 2015-06-04 10:42:37 +08:00
448ba042b5 Merge branch 'master' of github.com:m-labs/artiq 2015-06-04 10:35:52 +08:00
Yann Sionneau
b27254ba80 sync_struct test: test more cases, pep8 fix, remove print 2015-06-03 15:54:50 +02:00
Yann Sionneau
b8bdce5bd1 sync_struct test: don't poll, use Event instead 2015-06-03 15:40:58 +02:00
Yann Sionneau
21d88d8345 tests: use a different event loop for each test 2015-06-03 15:23:34 +02:00
a2ae5e4706 runtime: report TTL status over UDP 2015-06-03 18:26:19 +08:00
Yann Sionneau
e5f16b29fd sync_struct: fix test case name 2015-06-03 10:46:09 +02:00
Yann Sionneau
c7953da7e1 test: add unittest for sync_struct 2015-06-03 10:43:01 +02:00
Yann Sionneau
140239fee4 pxi6733: allow to set the sampling frequency 2015-06-03 00:34:11 +02:00
59b339462c Merge branch 'master' of github.com:m-labs/artiq 2015-06-02 17:45:16 +08:00
b81151eb42 soc: rtio monitor 2015-06-02 17:41:40 +08:00
whitequark
f979a76c7c Require nonlocal names to be bound in an outer scope. 2015-05-30 08:06:19 +03:00
048782e26c test/scheduler: test flush 2015-05-29 20:16:47 +08:00
6ff2e1a083 test/scheduler: verify that a high priority timed experiment in the future is not run 2015-05-29 19:43:39 +08:00
Yann Sionneau
575dfade38 flash_storage comm: use OK/ERROR replies instead of specific FLASH_WRITE_REPLY 2015-05-29 11:10:40 +02:00
whitequark
56d1a9bc57 Shorten the unification error message when too redundant. 2015-05-29 10:01:22 +03:00
whitequark
abbc87e981 Add new type inferencer. 2015-05-29 09:53:24 +03:00
aa242f7c66 scheduler: simplify priority policy
Remove overdueness. User must submit calibration experiments with higher priority values for them to take precedence.
2015-05-28 18:24:45 +08:00
b0f8141018 scheduler: cancel flush when run is cancelled 2015-05-28 17:48:33 +08:00
e752e57fa5 scheduler: do not duplicate 'run terminated' information 2015-05-28 17:37:08 +08:00
4a7c6954c3 artiq_run: implement mockups of new scheduler API 2015-05-28 17:24:47 +08:00
737f6d4485 scheduler: support pipeline flush 2015-05-28 17:20:58 +08:00
whitequark
c75fd6bc88 Replace builtin ast with pythonparser.ast. 2015-05-27 17:04:18 +03:00
0b05b54a87 test: add scheduler unittest 2015-05-27 19:25:50 +08:00
Yann Sionneau
4bf7875b87 flash_storage: refactor + unit tests + artiq_coreconfig.py CLI + doc 2015-05-27 18:06:12 +08:00
Yann Sionneau
36cda96df0 pxi6733: add ping method to the driver 2015-05-25 22:16:31 +02:00
f30d671359 test/worker: adapt to priority API 2015-05-24 23:38:05 +08:00
5fb86af3a4 gui: support experiment cancellation 2015-05-24 23:20:52 +08:00
ae4615281f pyon/store_file: replace previous file atomically 2015-05-24 21:26:15 +08:00
fc449509b8 scheduler: pass priority to experiments 2015-05-24 20:37:47 +08:00
e611e17eeb gui: experiment submission 2015-05-24 20:24:07 +08:00
a21373841c scheduler: catch worker exceptions in prepare and analyze stages 2015-05-24 20:23:49 +08:00
d6ced1c780 scheduler: support priorities 2015-05-24 01:09:22 +08:00
2f910921f5 gui: console -> log 2015-05-24 00:38:30 +08:00
d9c25130e3 gui: add explorer widgets 2015-05-23 01:25:33 +08:00
2570444941 gui: add empty explorer and console docks 2015-05-22 23:30:46 +08:00
Yann Sionneau
d78a275655 pxi6733: use a method as DoneEvent callback 2015-05-22 16:08:07 +02:00
ea53ed1af7 gui: switch to Qt 2015-05-22 17:06:31 +08:00
Yann Sionneau
c91cd0ab38 pxi6733: use a writeable and c_contiguous numpy ndarray 2015-05-21 18:05:32 +02:00
785623be26 test/worker: adapt to new scheduler API 2015-05-21 16:41:45 +08:00
a670b9f660 tools/asyncio_wait_or_cancel: wait for cancellation 2015-05-21 16:41:27 +08:00
d8917fd94f Merge branch 'master' of github.com:m-labs/artiq 2015-05-17 16:11:16 +08:00
b74b8d5826 Scheduling TNG 2015-05-17 16:11:00 +08:00
Yann Sionneau
e9b166b199 artiq_flash.sh: some cleanup 2015-05-14 11:12:03 +02:00
e557d7e2df Merge branch 'master' of github.com:m-labs/artiq 2015-05-14 00:16:27 +08:00
cbb5027343 gateware/ad9858: use WaitTimer from Migen 2015-05-14 00:16:15 +08:00
a62ae1d8d7 test/transforms: adapt to 'now' save on core device 2015-05-12 23:06:33 +08:00
ce4b5739ed runtime: reset all DDSes upon startup 2015-05-09 17:12:38 +08:00
1ceb06fb16 dds: use context manager for batches 2015-05-09 14:47:40 +08:00
fdc406f062 transforms/inline: support user-defined context managers 2015-05-09 14:47:08 +08:00
5c08423b29 dds: support batches in driver 2015-05-08 22:17:06 +08:00
55f2fef576 runtime: support DDS batches 2015-05-08 16:51:54 +08:00
53c6339307 runtime: break ttl-specific functions from rtio 2015-05-08 16:20:12 +08:00
a36c51eb83 DDS over RTIO (batch mode not supported yet) 2015-05-08 14:44:39 +08:00
a91bb48ced gateware: adapt to misoc changes 2015-05-06 18:02:15 +08:00
9072647bdc ad9858: make read timing configurable, increase read delays 2015-05-05 19:33:34 +08:00
2adf9d91df recover_underflow -> break_realtime 2015-05-03 20:45:28 +08:00
4048568d8e support kernel handover with coherent time 2015-05-02 23:41:49 +08:00
cb65b1e322 rtio/phy/ttl_simple: reset sensitivity with RTIO logic 2015-05-02 16:17:31 +08:00
a61d701d47 rtio: decouple PHY reset from logic reset 2015-05-02 11:47:11 +08:00
65b4b7bb12 coredevice: rename rtio to ttl, integrated in+out driver, loopback on the same pin in tests 2015-05-02 10:35:21 +08:00
62669f9ff2 soc: factor timer, kernel CPU and mailbox 2015-05-01 18:51:24 +08:00
1684586ae8 test: add unittest for core device watchdog 2015-05-01 14:02:31 +08:00
109dfab76c frontend: add artiq_mkfs 2015-04-30 20:03:11 +08:00
8a796a6818 artiq_run/ELFRunner: create a core device object (necessary for runtime exception processing) 2015-04-30 10:16:24 +08:00
Zach Smith
5df446ec4b artiq_flash.sh: fix Pipistrello flash proxy filename 2015-04-30 09:24:13 +08:00
967145f2dc watchdog support on core device (broken by bug similar to issue #19) 2015-04-29 12:58:37 +08:00
9ecbb4c88d gateware/amp/mailbox: simplify 2015-04-29 12:56:21 +08:00
e5f7fcc339 coredevice/comm_tcp: raise exception on connection closed 2015-04-29 11:18:51 +08:00
283695e8aa language/core: integrate watchdogs 2015-04-28 23:23:59 +08:00
9b62e7e77b runtime,coredevice: support session reset for serial 2015-04-28 02:11:58 +08:00
27d94a22de rtio: expose full_ts_width instead of counter_width parameter 2015-04-28 01:38:11 +08:00
dc14728264 test/full_stack: use Ethernet 2015-04-28 01:33:37 +08:00
8a19766278 runtime,comm_generic: improve and fix list encoding 2015-04-28 01:31:55 +08:00
86c012924e targets: rename AMP->Top, merge peripherals 2015-04-28 00:18:54 +08:00
938e1c2842 Remove UP support.
The only advantage of UP is to support the Papilio Pro, but that port is also very limited in other ways and the Pipistrello provides a more reasonable platform that also supports AMP.

On the other hand, RPCs on UP are difficult to implement with the session.c protocol system (without an operating system or coroutines), along with many other minor difficulties and maintainance issues. Planned features such as watchdogs in the core device are also difficult on UP.
2015-04-27 20:43:45 +08:00
934a6b0495 runtime,coredevice: Ethernet support (buggy) 2015-04-23 23:22:40 +08:00
e4251c7f41 runtime: get lwip to run 2015-04-22 15:01:32 +08:00
18106cc014 comm: refactor to support lwip event model 2015-04-22 01:31:31 +08:00
9f52277245 coredevice/core: set default for ref_period 2015-04-22 01:12:01 +08:00
17f61b8e29 pxi6733: minor fixes 2015-04-21 16:23:09 +08:00
e27844e0f7 test/pxi6733: remove useless checks 2015-04-21 16:10:46 +08:00
Yann Sionneau
69388ccc1a pxi6733: add driver and controller 2015-04-21 16:09:55 +08:00
Yann Sionneau
e19f8896f0 artiq_rpctool: document numpy availability in RPC call cmd line arguments 2015-04-21 15:57:29 +08:00
301a0e6447 rpctool: import numpy 2015-04-21 15:57:25 +08:00
0c1d256fef comm_dummy: remove unneeded import 2015-04-19 11:41:20 +08:00
c98e08fe36 fix transforms unittest 2015-04-19 11:40:49 +08:00
0b8d496b62 coefficients: cleanup and refactor some code into CoefficientSource 2015-04-18 21:21:23 -06:00
60baed68b4 wavesynth: get coefficients.py into useable state
SplineSource() supports spline interpolating multi-channel tabular data,
cropping it and generating wavesynth compatible segment data from it.

ComposingSplineSource() needs some verification still.
2015-04-18 01:23:15 -06:00
Yann Sionneau
52fe66ee4d artiq_flash.sh: improve detection of flash proxy location
Flash proxy is now searched in ~/.migen /usr/local/share/migen
/usr/share/migen and in the directory specified by "-d" argument
or in artiq/binaries/<board_name>/ if "-d" is not specified.
2015-04-17 00:57:16 +08:00
546996f896 coredevice,runtime: put ref_period into the ddb 2015-04-16 15:15:38 +08:00
71167b8adf rtio: do not attempt latency compensation in gateware 2015-04-16 13:09:29 +08:00
6215d63491 rtio: do not create spurious CSRs when data_width/address_width is 0 2015-04-16 13:04:19 +08:00
26003781b4 rtio/rtlink: add 'like' methods to clone interfaces 2015-04-16 13:02:39 +08:00
30dffb6644 rtio/phy: add wishbone adapter 2015-04-15 20:39:40 +08:00
ecf6b29279 coredevice/rtio: minor docstring cleanup 2015-04-15 13:53:00 +08:00
c0213c9f69 artiq_flash.sh: add pipistrello 2015-04-14 22:37:08 -06:00
9795e83bfc pdq2: continue work on coefficients 2015-04-14 18:18:49 -06:00
6a0e97f161 pdq2: refactor program_frame(), cleanup test, stall correctly
Once the Sequencer ack's a line, the Parser starts preparing the
next one. This includes jumping through the frame table if necessary.
To stall the Parser while the Sequencer executes the last line of a
frame and to ensure that the frame select lines can be set up and their
sampling is synchronized to a trigger, we add a triggered stall line
at the end of the frame.

When that line is triggered the Parser jumps through the table and starts
parsing the first line of the next frame. We let the duration of this
last stall line be 10 cycles (200ns@50MHz) to be able to distinguish this
sampling of the frame select lines from the triggering of the first line
in the next frame.

frame           f
parser     n     f 0
stb        __---________---___
trigger    ___----_______----_
ack        ____-__________-___
sequencer  n-1 n          0
2015-04-14 18:18:16 -06:00
bc1acef355 test/pdq2: don't write vcd 2015-04-14 18:18:16 -06:00
4c10182c9f rtio: refactor, use rtlink 2015-04-14 19:44:45 +08:00
ff9a7727d2 rtio: add rtlink definition (currently unused) 2015-04-13 22:19:18 +08:00
07b8e1292f artiq_flash: fix stderr redirections 2015-04-11 23:43:33 +08:00
8a2b8fc634 artiq_flash: do not always assume permission problems 2015-04-11 22:54:17 +08:00
Yann Sionneau
8a3be4eca0 artiq_flash: add support for kc705 2015-04-11 22:38:11 +08:00
88e0aae16d coredevice: add comm_tcp 2015-04-10 01:22:03 +08:00
f427041ae9 coredevice/comm_serial: minor cleanup 2015-04-10 01:21:47 +08:00
cb2596bd81 coredevice/comm: split protocol to allow reuse for Ethernet 2015-04-10 00:59:35 +08:00
efd1c24ed7 frontend: add artiq_compile tool to build default experiment 2015-04-07 15:41:32 +08:00
ca89b6d0ed worker_db: support read-only mode 2015-04-07 15:40:57 +08:00
fda4ee1a83 coredevice: add compile method 2015-04-07 15:40:25 +08:00
5e046dc5ce artiq_run: move parse_arguments and get_experiment to tools 2015-04-07 13:04:47 +08:00
7e591bb1c7 targets: use _Peripherals/UP/AMP class names, share QC1 IO defs 2015-04-07 00:07:53 +08:00
1ed60e0829 gateware/amp: use new ModuleTransformer API 2015-04-06 23:54:53 +08:00
72f9f7ed79 runtime: implement mailbox, use it for kernel startup, exceptions and termination 2015-04-05 22:07:34 +08:00
7ea9250b31 wavesynth: interpolate->coefficients 2015-04-05 04:43:27 -06:00
0bab73eece wavesynth/compute_samples: fix list mutation bug 2015-04-05 18:41:06 +08:00
9fd4594c53 interpolate: refactor discrete_compensate 2015-04-05 04:32:23 -06:00
75dfa95b4d wavesynth: move test code to unittests, fix mutability style 2015-04-05 04:24:44 -06:00
3257275782 worker_db: get_logger -> getLogger 2015-04-05 18:02:07 +08:00
1d5f467da7 pdq2: implement changes in trigger/jump semantics, add unittest
The unittests now runs the compute_samples.Synthesizer against the actual
gateware and verifies similarity (up to integer rounding errors).
2015-04-05 03:55:54 -06:00
e870b27830 wavesynth: new semantics, fix compensation
* "trigger" now means that the corresponding line will only start
  once the trigger line is high.
* "jump" is implicit as the last line in a frame must jump back.
* spline coefficients are now compensated for finite time step size
2015-04-05 03:55:54 -06:00
1f545346e3 wavesynth: implement silence, add defaults, fix bias 2015-04-05 03:55:54 -06:00
051b01f58e wavesynth: refactor testing code 2015-04-05 03:55:54 -06:00
71b7fe38bc worker_impl: add missing import 2015-04-05 17:50:48 +08:00
9b46bc623a dbhub: do not use as context manager, turn close exceptions into warnings, do not close devices early in worker 2015-04-05 17:49:41 +08:00
0ec7e9a98c artiq_run: fix get_argparser() 2015-04-04 21:17:24 -06:00
1a1afd5410 artiq_run: refactor, support use from within experiments
You can always (under posix) use #!/usr/bin/env artiq_run as
shebang for experiments and make them executable.
Now, you can also do this (portable):

if __name__ == "__main__":
    from artiq.frontend.artiq_run import run
    run()

to make an experiment executable. The CLI options are all inherited.
Also:

* removed --elf: can be inferred from filename
* did some refactoring and cleanup
* use logging for all messages, except the result printing (use -v to get
parameter changes and dummy scheduler actions)
2015-04-04 20:51:48 -06:00
43893c6c1d worker_impl: use DBHub as context manager 2015-04-04 20:51:48 -06:00
7b86138fd2 DBHub: make it a context manager 2015-04-04 20:51:48 -06:00
d1653589f9 pdq2: spelling fix 2015-04-04 14:26:32 -06:00
16ff190731 pdq2: cleanup unittest 2015-04-04 14:26:32 -06:00
833178462d remove gpio driver 2015-04-04 22:06:54 +08:00
c6d3750076 runtime,amp: set kernel memory start to SDRAM+128K, use custom linker file to split memory 2015-04-03 16:03:38 +08:00
fb91955260 tests: make hardware-in-the loop flags positive logic
Explicitly having to disable unittests that require hardware
(ARTIQ_NO_HARDWARE) is cumbersome.
There is not even a sensible default for the
device or serial number of the devices requiring additional
variables (ARTIQ_LDA_DEVICE etc).

This patch reverts the logic by skipping unittests that
can not automatically determine whether the required hardware
is present and where it is.
2015-04-03 11:51:03 +08:00
Florent Kermarrec
2995f0a705 remove use of _r prefix on CSRs 2015-04-02 18:30:44 +08:00
5bd8d414cf gateware/amp: add kernel CPU and mailbox modules 2015-04-02 16:49:36 +08:00
Yann Sionneau
e7be00baa8 Add support for automatic build and upload of dev conda artiq packages to binstar by travis-ci
- SoC+BIOS are also built and integrated in the conda package
- artiq_flash.sh script is embedded to allow flashing ppro board
2015-03-30 19:51:52 +08:00
3108ffeef6 coredevice/comm_serial: use lazy formatting in logging 2015-03-27 18:54:19 +01:00
f4cb97b709 comm_serial: fix baud rate change logging 2015-03-25 17:57:53 -06:00
bd2f6ea9f9 thorlabs_tcube_controller: use simple_network_args 2015-03-25 16:20:08 +01:00
Yann Sionneau
5ca5a3602e novatech409b: cleanup 2015-03-25 16:11:11 +01:00
03139808bd [WIP] wavesynth/interpolate: wavesynth programming tools
* interpolate(t, v) will generate the channel data subset of a wavesynth
program

* still broken
2015-03-23 20:38:33 -06:00
6a0bc19279 pdq2/driver: document a few units 2015-03-23 20:31:37 -06:00
768fa21488 lda_controller: show default product type 2015-03-23 20:02:36 +01:00
bd145bbabc use %(default) in argparse 2015-03-23 20:02:14 +01:00
b597483913 thorlabs_tcube: spelling, fix ping 2015-03-23 17:24:12 +01:00
Yann Sionneau
91336f974d lda_controller: replace serial argument with device one 2015-03-23 17:02:39 +01:00
Yann Sionneau
2651050c83 Controller cleanups 2015-03-23 17:02:39 +01:00
0b174085c8 pdq2/mediator: rewrite, adapt to new PDQ RPC format, support anonymous segments, support uploading to controllers 2015-03-22 22:30:59 +01:00
c18efa11b3 wavesynth: fix frame/segment terminology 2015-03-22 10:56:34 +01:00
1b7f71bda9 controllers: consistent device/simulation specification 2015-03-22 00:48:15 +01:00
7e61f66493 pdq2/mediator: get pdq devices from pdb 2015-03-22 00:24:42 +01:00
8cb77b0336 pdq2: rename url parameter to device and require it 2015-03-21 00:33:50 -06:00
05781699b8 pdq2: driver and unittest
* parses wavesynth style programs
* verified with cosimulated gateware
2015-03-21 00:29:00 -06:00
200e20fb39 worker: close devices immediately after run and before analyze 2015-03-20 12:01:34 +01:00
577754c38f pdq2: fix argparser 2015-03-19 22:26:12 -06:00
222d0a9d37 pdq2_controller: add dump option 2015-03-19 21:38:46 -06:00
5ab3290ed4 pdq2: add refactored client code 2015-03-19 20:34:29 -06:00
fae7246f30 pdq2: merge from main pdq2 repo 2015-03-19 14:34:37 -06:00
2257cfa952 wavesynth/compute_samples/: demonstrate dds clear 2015-03-15 18:13:47 +01:00
40bd101de0 wavesynth/compute_samples/SplinePhase: fix reduction 2015-03-15 18:13:09 +01:00
1d0fde7f13 wavesynth: program decoding 2015-03-15 18:05:03 +01:00
327448977c wavesynth/compute_samples: use set_coefficients 2015-03-15 16:48:24 +01:00
0d8260af6e wavesynth: basic sample computation 2015-03-15 16:30:07 +01:00
2b3641ac0a db,worker: fix realtime result initialization 2015-03-13 15:12:55 +01:00