2
0
mirror of https://github.com/m-labs/artiq.git synced 2024-12-19 16:36:29 +08:00
Commit Graph

1388 Commits

Author SHA1 Message Date
whitequark
22570afbda LLVMIRGenerator: allocate less. 2015-08-10 09:12:34 +03:00
whitequark
dfc91a35f2 ARTIQIRGenerator.polymorphic_print: str([x]) uses repr(x), not str(x). 2015-08-09 20:27:04 +03:00
whitequark
f7b64db8f4 LLVMIRGenerator: fixup phis on expansion of ARTIQ instructions. 2015-08-09 20:24:16 +03:00
whitequark
d4270cf66e Implement receiving data from RPCs. 2015-08-09 20:17:00 +03:00
whitequark
02b1543c63 Implement receiving exceptions from RPCs. 2015-08-09 16:16:41 +03:00
whitequark
8b7d38d203 Add ARTIQ_DUMP_ASSEMBLY. 2015-08-09 15:47:29 +03:00
54b11a392a ctlmgr: graceful controller termination 2015-08-09 20:41:11 +08:00
4b195663f6 pc_rpc/Server: add built-in terminate 2015-08-09 20:40:15 +08:00
whitequark
9c5ca2ae29 LLVMIRGenerator: add target data layout to LLVM modules. 2015-08-09 14:39:21 +03:00
a21049d779 ctlmgr: exponential backoff 2015-08-09 18:28:56 +08:00
3f68d0ba8f ctlmgr: ping controllers 2015-08-09 17:30:46 +08:00
479175870f pdq2/driver: implement ping 2015-08-09 17:30:01 +08:00
whitequark
153592f1cc Naming. 2015-08-09 02:25:58 +03:00
whitequark
b26af5df60 Implement sending RPCs. 2015-08-09 02:17:19 +03:00
whitequark
22457bc19c Ensure uwtable is added to all generated functions. 2015-08-08 21:48:21 +03:00
whitequark
13ad9b5d08 Allow to dump ARTIQ/LLVM IR for stitched code. 2015-08-08 21:47:20 +03:00
whitequark
ee3f35c608 Improve error message on passing an argument twice. 2015-08-08 21:06:13 +03:00
f81b2eba43 master: better repo scan error handling 2015-08-08 23:36:12 +08:00
400b414885 master,client: support scanning specific repo revisions 2015-08-08 23:23:25 +08:00
671a3f1833 doc: precision about dds batch time 2015-08-08 23:05:00 +08:00
whitequark
bdcf7f100b ARTIQIRGenerator: add semantic locs to all other implicitly raised exceptions. 2015-08-08 16:26:53 +03:00
0a6fcd9fa0 Revert "comm_generic: cleanup"
This reverts commit be55487d2d.
2015-08-08 21:24:23 +08:00
whitequark
acd8d6355f transforms.ARTIQIRGenerator: IndexError loc should point to "[". 2015-08-08 16:18:57 +03:00
whitequark
96c770190c Add column marker to ARTIQ exception traceback. 2015-08-08 16:09:47 +03:00
whitequark
27d2390fed Add zero-cost exception support to runtime and host. 2015-08-08 16:01:31 +03:00
whitequark
4efae2b67d Formatting. 2015-08-08 13:48:25 +03:00
whitequark
ecdebc0b8a session.c: refactor. 2015-08-08 13:21:43 +03:00
1818e8173b client: log display support 2015-08-08 18:02:42 +08:00
c80f0fa07a master: delete head repository checkout on exit 2015-08-08 11:44:19 +08:00
42010fcd4b gui: regenerate argument setter when modified from repository 2015-08-08 11:38:07 +08:00
585bb236f8 master: add ddb/pdb args 2015-08-08 11:13:36 +08:00
54d85efc2a master,gui: show Git commit messages in schedule 2015-08-08 11:08:04 +08:00
whitequark
d6ab567242 coredevice.comm_*: refactor. 2015-08-07 16:44:16 +03:00
be55487d2d comm_generic: cleanup 2015-08-07 21:12:00 +08:00
whitequark
acc97a74f0 Fix compiler.module. 2015-08-07 14:21:53 +03:00
whitequark
a7633f75c7 Show origin of expansion in diagnostics for synthesized code. 2015-08-07 13:56:18 +03:00
whitequark
50448ef554 Add support for referring to host values in embedded functions. 2015-08-07 13:24:01 +03:00
whitequark
353f454a29 Add basic support for embedded functions with new compiler. 2015-08-07 11:44:49 +03:00
7ed8fe57fa Git support 2015-08-07 15:51:56 +08:00
whitequark
b5cf1e395d runtime: avoid race condition when running kernel.
Also, don't bother passing kernel name: entry point is already
recorded in DT_INIT when the kernel is linked.
2015-08-07 08:51:33 +03:00
whitequark
1a969aa9e4 compiler.transforms.inferencer: accept and ignore @kernel decorator. 2015-08-07 07:54:35 +03:00
968760d48f gui: save geometry of main window 2015-08-06 22:27:46 +08:00
e078dabd3c tools/TaskObject: do not suppress exceptions raised by terminating task 2015-08-06 22:14:49 +08:00
9261254653 language/environment: support non-stored results 2015-08-06 18:43:27 +08:00
59a29ae04b language/environment: remove attr_rtresult
This function has the typical side effect of clearing the result. When happening in build(), this caused minor trouble when using pipelined scheduling (no result displayed at all until run() proceeds).
2015-08-06 18:23:09 +08:00
fd795724f2 gui: better display of None 2015-08-06 18:03:05 +08:00
263ff86e66 gui: support X axis, fit, error bars in XY plot 2015-08-06 18:02:40 +08:00
7180552d24 gui: support setting histogram X axis 2015-08-06 15:34:58 +08:00
whitequark
7562d39750 compiler.module: split off inferencing from Module.__init__. 2015-08-06 08:25:53 +03:00
whitequark
ca52b2fdd0 compiler.transforms.ARTIQIRGenerator: fix typo. 2015-08-06 08:25:53 +03:00
cddb5b9ae4 gui: save explorer state 2015-08-05 13:35:28 +08:00
c8db83b11f gui: add verbosity args for debugging 2015-08-05 11:41:43 +08:00
whitequark
4a8e397a77 Fold llvmlite patches into m-labs/llvmlite repository. 2015-08-05 03:49:01 +03:00
whitequark
ad7cbc4394 Rename artiq_coreconfig → artiq_coretool; add log subcommand. 2015-08-02 16:40:58 +03:00
whitequark
8d0222c297 Rename artiq_coreconfig → artiq_coretool; add log subcommand. 2015-08-02 16:40:43 +03:00
whitequark
62fdc75d2d Integrate libdyld and libunwind.
It is currently possible to run the idle experiment, and it
can raise and catch exceptions, but exceptions are not yet
propagated across RPC boundaries.
2015-08-02 15:43:03 +03:00
whitequark
aae2923c4c runtime: add lognonl{,_va} functions.
The kernels have print(), which prints aggregates (such as
arrays) piece-by-piece, and newlines would interfere.
2015-08-02 06:33:12 +03:00
b2f720da67 gui: better state error handling
Remains limited by issue pyqtgraph/pyqtgraph#204
2015-08-01 19:52:13 +08:00
8ad88438c7 gui: save display state 2015-08-01 19:37:16 +08:00
a64766a10d protocols/FlatFileDB: remove unneeded default_data 2015-08-01 16:49:05 +08:00
00cae1c23a gui: save dock area state 2015-08-01 16:48:44 +08:00
9e24b56099 gui: add state manager 2015-08-01 16:48:27 +08:00
whitequark
e8943a008c Rename compiler/{targets/__init__.py → targets.py}. 2015-07-30 10:35:04 +03:00
whitequark
1e3911ed39 Use try..finally in compiler.targets.Target.link. 2015-07-30 10:33:54 +03:00
whitequark
b0185f3917 Add profiling to the performance testbench. 2015-07-29 22:23:22 +03:00
whitequark
d7f9af4bb5 Fix accidentally quadratic code in compiler.ir.Function._add_name. 2015-07-29 21:36:31 +03:00
whitequark
6d8d0ff3f5 Update performance testbench to include time spent in ARTIQ. 2015-07-29 21:28:07 +03:00
whitequark
3b5d3e2b1a Add a performance measurement testbench. 2015-07-29 21:17:52 +03:00
whitequark
e8c107925c Implement shared object linking. 2015-07-29 20:35:16 +03:00
6b98f867de import DDS phase modes at the top level 2015-07-29 23:32:33 +08:00
86fef7b53b master: do not scan experiments starting with '_' 2015-07-29 23:29:07 +08:00
a8c13cb7de gui: fix NumberEntry min/max 2015-07-29 23:28:34 +08:00
1d34c06d79 rtio: detect collision errors 2015-07-29 19:43:35 +08:00
b548d50a2f test/coredevice: use ttl_out for PulseRate (loop is less available) 2015-07-29 19:42:43 +08:00
whitequark
2cd25f85bf Rename artiq.compiler.testbench.{module → signature}. 2015-07-29 14:32:34 +03:00
whitequark
3378dd57b8 Fold llvmlite patches into m-labs/llvmlite repository. 2015-07-29 13:54:00 +03:00
whitequark
fd46d8b11e Merge branch 'master' into new-py2llvm 2015-07-29 12:52:19 +03:00
90368415a6 ttl: remove timestamp function
The general idea is that functions that work with absolute timestamps exist only in machine units versions, to help prevent floating point losses of precision. Time differences should be computed in machine units and then converted, e.g. mu_to_seconds(t2-t1).

This function would have had problems after ~50 days of running the device.
2015-07-29 11:11:16 +08:00
2640a57af3 test/coredevice: let output() settle longer 2015-07-28 16:20:05 -06:00
5f5227f01f ttl: add timestamp() 2015-07-28 16:20:05 -06:00
e95b66f114 ttl: remove spurious _mu 2015-07-28 16:20:05 -06:00
fb339d294e serdes_s6: no need to reset 2015-07-28 12:54:31 -06:00
9ac5bc52d4 rtio: add spartan6 serdes, 4x and 8x 2015-07-27 21:01:15 -06:00
whitequark
2939d4f0f3 Add tests for finally clause and reraising. 2015-07-27 12:36:21 +03:00
whitequark
a83e7e2248 Add tests for exceptional control flow. 2015-07-27 10:22:28 +03:00
whitequark
90be44c596 Add tests for non-exceptional control flow across finally. 2015-07-27 10:13:22 +03:00
whitequark
7c77dd317a Implement __artiq_personality. 2015-07-27 09:10:20 +03:00
b1d58bd4c8 rtio: fix replace/sequence_error when fine_ts_width > 0 2015-07-27 12:22:35 +08:00
959b7a7b46 rtio: resetless -> reset_less 2015-07-27 11:46:56 +08:00
fe6a5c42df rtio: remove unused clk_freq argument 2015-07-27 10:57:15 +08:00
5b50f5fe05 rtio/ttl_serdes_7series: use recommended OSERDES T configuration 2015-07-27 10:50:50 +08:00
whitequark
47f13bf921 Always load the personality library in JIT testbench, if available. 2015-07-27 04:44:40 +03:00
whitequark
14c7b15785 Add a test harness for exceptions.
The libunwind.h is duplicated here so that it would be possible
to test the Python parts without pulling in misoc.
2015-07-27 04:18:12 +03:00
whitequark
7903889082 Merge branch 'master' into new-py2llvm 2015-07-27 03:29:00 +03:00
f68d5cbd73 rtio: forward rtio domain reset to rio and rio_phy domains 2015-07-27 01:52:47 +08:00
940aa815dd rtio/ttl_serdes: cleanup/rewrite 2015-07-27 01:44:52 +08:00
Yann Sionneau
d90dff4ef1 rtio: add SERDES TTL (WIP) 2015-07-26 17:40:34 +08:00
d14a31f443 artiq_run: fix ELF running 2015-07-25 15:52:38 +08:00
696bceb406 gui: feedback on run deletion 2015-07-25 15:08:27 +08:00
61f45f505b gui/short_format: show string values 2015-07-25 14:37:19 +08:00
05dd11a60d protocols/pyon: support numpy scalars (closes #53) 2015-07-25 12:28:56 +08:00
8bc1dd9f9c test/serialization: remove redundant test since Quantity was removed 2015-07-25 12:23:43 +08:00
9fe65769f2 gui: add console description 2015-07-25 12:01:47 +08:00
whitequark
692791f0bd Make sure a landing pad returns {i8*} to soothe LLVM codegen. 2015-07-25 07:01:25 +03:00
5979f85c1c gui: use monospace font in log 2015-07-25 11:38:26 +08:00
whitequark
ece52062f2 Implement code generation for exception handling. 2015-07-25 05:37:37 +03:00
ef8b09d9bc gui: add console 2015-07-25 00:36:16 +08:00
928775f6ac gui: fix default LinearScan/RandomScan 2015-07-25 00:35:21 +08:00
5b62b2452d gui: get spinboxes to behave 2015-07-25 00:32:18 +08:00
7d81520827 protocols/pc_rpc: improve docstrings 2015-07-25 00:30:36 +08:00
whitequark
c581af29d7 Merge remote-tracking branch 'origin/master' into new-py2llvm 2015-07-23 21:36:17 +03:00
6b0e120d75 wavesynth/Synthesizer: allow empty data 2015-07-23 12:34:54 -06:00
5b1165f413 gui: log autoscroll 2015-07-24 00:11:05 +08:00
1a4028ca92 gui: better log lookandfeel 2015-07-24 00:08:14 +08:00
3a06e22b67 master: handle logging while scanning repository 2015-07-23 23:06:15 +08:00
aa2acb9137 gui: auto resize of table columns 2015-07-23 22:36:52 +08:00
whitequark
20f5f8217d Make sure tests pass both on ARTIQ Python and CPython.
In some cases (the `is` operator and wraparound arithmetics)
the tests will only pass on ARTIQ Python. These are conditionally
commented out.
2015-07-23 08:09:25 +03:00
whitequark
65121b437f Rework internal logic of slices. 2015-07-23 07:57:49 +03:00
whitequark
2b9ac344d8 Verify LLVM module in compiler.textbench.jit. 2015-07-23 07:57:35 +03:00
whitequark
9db199cad9 Handle closure effects appropriately in LocalAccessValidator. 2015-07-23 03:15:36 +03:00
whitequark
acb8810e62 Add tests for lambdas and functions. 2015-07-23 03:07:30 +03:00
whitequark
f8c2709943 Make division by zero raise an exception. 2015-07-23 01:26:50 +03:00
whitequark
4cfe4ea148 Make negative and too-far shifts have defined behavior. 2015-07-23 00:58:41 +03:00
whitequark
bf60978c7b Add bool coercion support. 2015-07-22 19:15:54 +03:00
whitequark
de181e0cb9 Revert "Require boolean operand in BoolOp."
This reverts commit 5d518dcec6.
2015-07-22 18:35:18 +03:00
whitequark
51aef980a0 Revert "Require boolean condition in If, While, IfExp."
This reverts commit e21829ce74.
2015-07-22 18:35:14 +03:00
whitequark
f2a6110cc4 Add integration tests for every language construct. 2015-07-22 18:34:52 +03:00
0b10f72c2b Merge branch 'master' of https://github.com/m-labs/artiq 2015-07-22 10:44:49 +08:00
whitequark
dff4ce7e3a Return LLVM IR module from LLVMIRGenerator.process. 2015-07-22 04:13:04 +03:00
whitequark
986d9d944f Add artiq.compiler.testbench.run. 2015-07-22 04:10:15 +03:00
whitequark
86e006830c Use the correct printf format for 64-bit integers. 2015-07-22 03:05:15 +03:00
whitequark
236d5b886a Add support for Assert. 2015-07-22 02:58:59 +03:00
073e09ed36 gui: common format for results/params 2015-07-22 06:01:09 +08:00
bd2bd68a54 gui,client: do now show arguments 2015-07-22 05:47:14 +08:00
8402f1cdcd master,gui: basic log support 2015-07-22 05:13:50 +08:00
e247fb5415 gui/tools: add ListSyncModel 2015-07-22 05:13:46 +08:00
whitequark
5d518dcec6 Require boolean operand in BoolOp. 2015-07-21 23:46:22 +03:00
whitequark
e21829ce74 Require boolean condition in If, While, IfExp. 2015-07-21 23:39:22 +03:00
whitequark
1e851adf4f Add a polymorphic print function. 2015-07-21 22:32:10 +03:00
179ca36d09 gui: basic scan support 2015-07-21 21:24:24 +02:00
whitequark
0e7294db8d Null-terminate all string literals. 2015-07-21 19:57:18 +03:00
whitequark
9d20080624 Use internal linkage for interior Python global values. 2015-07-21 19:55:43 +03:00
whitequark
8c9d9cb5a1 Make compiler.testbench.llvmgen emit a main() function. 2015-07-21 19:48:44 +03:00
whitequark
7301a76d68 Mark string constants as unnamed_addr.
As a result they will be merged when possible.
2015-07-21 17:10:31 +03:00
whitequark
49ece6a12a Add support for string literals. 2015-07-21 14:27:48 +03:00
whitequark
64d2604aa8 Tolerate assertion failures in tests when looking for diagnostics. 2015-07-21 14:12:27 +03:00
whitequark
ec9d40b04f Add LLVM IR generation for function calls. 2015-07-21 13:45:27 +03:00
whitequark
e299801c0f LocalAccessValidator: fix validation of closures with no outer variables. 2015-07-21 13:16:18 +03:00
whitequark
6f11fa6bb1 Add conversion to LLVM IR (except handling of exception handling). 2015-07-21 04:55:01 +03:00
47191eda91 dds monitor: relax timing (for pipistrello) 2015-07-19 21:36:51 -06:00
1a0dc499dd gui: exit when main window is closed 2015-07-19 18:27:41 +02:00
bb05ed268e language/scan: add argument processor 2015-07-19 16:47:35 +02:00
whitequark
c6cd318f19 Fix artiq.compiler.ir.BasicBlock.__repr__. 2015-07-19 16:32:33 +03:00
937ca853aa language/scan: fix random scan, add explicit scan, specify what runs on host/device 2015-07-19 11:36:52 +02:00
whitequark
7e3f91c0bb Teach closures to LocalAccessValidator. 2015-07-19 12:08:26 +03:00
whitequark
2c010b10ee Remove UnaryOp ARTIQ IR instruction; rename BinaryOp to Arith.
Everything it can express can also be expressed via Arith.
2015-07-19 11:51:53 +03:00
whitequark
ac491fae47 Add LocalAccessValidator. 2015-07-19 11:44:51 +03:00
whitequark
adf18bb042 Fix assignment to tuples in IRGenerator. 2015-07-19 10:31:11 +03:00
whitequark
4bd83fb43d Use ".k" instead of "k" for the finalizer continuation variable.
The dot signifies that this is an internal variable and it
does not need to be tracked as if it was a user-defined one.
2015-07-19 10:30:42 +03:00
whitequark
8eedb3bc44 Fix IRGenerator.append(loc=...). 2015-07-19 10:29:33 +03:00
whitequark
f212ec0263 Add a trivial dead code elimination transform.
Its purpose is to sweep up basic blocks with no predecessors,
which are annoying to handle explicitly elsewhere.
2015-07-19 10:29:14 +03:00
whitequark
603d49dffa Add a dominator analysis. 2015-07-18 20:48:52 +03:00
whitequark
224a93fde3 Make compiler.ir.BasicBlock.predecessors much faster. 2015-07-18 20:48:11 +03:00
deaa492566 language: add scan iterators 2015-07-18 19:26:41 +02:00
9e29a4650a environment,gui: more argument types 2015-07-18 16:25:08 +02:00
5f95a302e6 environment: improve docstrings 2015-07-18 16:24:37 +02:00
657f198cdc gui: display '---' on failed number result 2015-07-18 10:26:47 +02:00
whitequark
47cbadb564 Revert "Ensure bindings are created in correct order for e.g. "x, y = y, x"."
This reverts commit bcd1832203.

The bindings are actually created in lexical order, as evident
in e.g. "x = lambda: x". The safety provided by this check should
be instead provided by a local access analysis.
2015-07-18 09:54:11 +03:00
whitequark
8e1cc8d985 Add an explicit ARTIQ IR instruction to create a closure. 2015-07-18 09:27:34 +03:00
whitequark
5ad02d5282 Fix ARTIQ IR generation for variables declared global. 2015-07-18 09:10:41 +03:00
whitequark
21eafefd28 Fix inference for globals. 2015-07-18 08:13:49 +03:00
whitequark
0d66bdfbf8 Fix For miscompilation. 2015-07-18 07:58:43 +03:00
whitequark
dde2e67c3f Add source locations to ARTIQ IR instructions. 2015-07-18 07:49:42 +03:00
whitequark
255ffec483 Generate more compact ARTIQ IR for else-less if. 2015-07-18 07:49:27 +03:00
dd7920f0c3 gui: basic argument support 2015-07-17 21:28:46 +02:00
whitequark
e96bc3c36c Add complete IR generator. 2015-07-17 21:29:06 +03:00
2576036ba1 language,worker: preserve order of arguments 2015-07-17 19:32:38 +02:00
6b36d93cc2 master,client: support repository rescan 2015-07-17 18:55:48 +02:00
4907991ea3 sync_struct: docstring cleanup 2015-07-17 18:53:43 +02:00
whitequark
f28549a11a Add builtins.is_exception. 2015-07-17 16:05:02 +03:00
whitequark
3b661b2b65 Fix environment corruption by ExceptHandler without a name. 2015-07-17 16:04:46 +03:00
39c6bc940c coreconfig: use new database API (closes #75) 2015-07-17 10:49:55 +02:00
9649e1837a gui: basic plotting 2015-07-16 20:52:53 +02:00
a83473a19a sync_struct: clarify notify_cb doc 2015-07-16 20:52:27 +02:00
whitequark
2dcb744519 Fix inference for default arguments. 2015-07-16 17:26:31 +03:00
whitequark
f8e51e07d5 Add zero/one accessors to TBool, TInt, TFloat. 2015-07-16 16:03:24 +03:00
whitequark
bcd1832203 Ensure bindings are created in correct order for e.g. "x, y = y, x". 2015-07-16 15:59:59 +03:00
whitequark
5756cfcebc Correctly infer type of list(iterable). 2015-07-16 15:35:46 +03:00
whitequark
6cda67c0c6 Ensure type comparisons see through type variables. 2015-07-16 14:59:05 +03:00
whitequark
c1e7a82e97 Add IndexError and ValueError builtins. 2015-07-16 14:58:40 +03:00
whitequark
b58fa9067d Add attributes to TRange.
Also make attributes an OrderedDict, for stable order during
LLVM IR generation.
2015-07-16 14:57:44 +03:00
whitequark
a6950bf11d Move builtin.is_{builtin,exn_constructor} to types. 2015-07-16 14:56:39 +03:00
whitequark
5000f87dfc Rename the field of CoerceT from expr to value. 2015-07-16 14:55:23 +03:00
whitequark
e9416f4707 Convert Slice into typed SliceT. 2015-07-16 14:54:04 +03:00
whitequark
53fb03d1bf Restrict comprehensions to single for and no if clauses. 2015-07-16 14:52:41 +03:00
whitequark
227f97f8a3 Add inference for Index, Slice and ExtSlice. 2015-07-16 04:22:41 +03:00
66940ea815 rtio: disable NOP suppression after reset and underflow 2015-07-15 20:54:55 +02:00
f836465585 coredevice: environment -> runtime 2015-07-15 11:20:41 +02:00
84de2fb28b expid: experiment -> class_name 2015-07-15 11:08:12 +02:00
255aba9247 test/worker: remove stale handler 2015-07-15 11:07:48 +02:00
7de56666e3 worker,environment: support scanning of arguments with no default 2015-07-15 10:59:48 +02:00
9ed4dcd7d1 repository: load experiments in worker, list arguments 2015-07-15 10:54:44 +02:00
whitequark
c724e024ce Fix inference for multiple-target assignments. 2015-07-15 06:33:44 +03:00
7770ab64f2 worker: factor timeouts 2015-07-14 23:43:08 +02:00
whitequark
9ff9f85f19 Add accessors to instructions. 2015-07-14 22:18:38 +03:00
e20b260117 gui: fix selections 2015-07-14 19:08:08 +02:00
21e8596d8c gui: RT results overview 2015-07-14 17:31:18 +02:00
55cd41444e gui/DictSync: better support of nested structs 2015-07-14 17:30:55 +02:00
1edeb5a13f sync_struct: docstring cleanup 2015-07-14 17:30:21 +02:00
84e7f55df3 gui: fix DDS class recognition 2015-07-14 17:28:26 +02:00
Yann Sionneau
6e3fd591f7 gui: remove unnecessary QSplitter 2015-07-14 16:59:04 +02:00
whitequark
bdcb24108b Add basic IR generator. 2015-07-14 08:56:51 +03:00
whitequark
f417ef31a4 Make binop coercion look through CoerceT nodes.
This fixes inference for "x = 1 + 1" after int monomorphization.
2015-07-14 06:42:09 +03:00
Yann Sionneau
90ba9f7bbf llvmlite: rename our package to be llvmlite_or1k to avoid collision with llvmlite package needed for numba 2015-07-14 01:01:56 +02:00
56fc7a484c TTLInOut: timestamp -> timestamp_mu 2015-07-13 23:21:29 +02:00
820ff2da2c test/coredevice: WA for lack of constant string support in compiler (see issue #68) 2015-07-13 22:22:26 +02:00
32d141f5ac refactor ddb/pdb/rdb 2015-07-13 22:21:32 +02:00
whitequark
ebe243f8d9 Add printing of SSA functions. 2015-07-13 21:08:20 +03:00
whitequark
dbdd45acc5 Add missing return. 2015-07-13 20:52:55 +03:00
whitequark
7c9afcce85 Fix Python default argument fiasco. 2015-07-13 20:52:48 +03:00
8b02b58a77 sync_struct/Notifier: do not pass root param to publish 2015-07-13 17:12:59 +02:00
0e92cfe053 artiq_run: remove support for stale watchdog API 2015-07-11 22:26:37 +02:00
whitequark
7c52910dc5 Add a basic SSA IR. 2015-07-11 18:46:37 +03:00
80eea4ce6c test: relax test_time_keeps_running
on pipistrello this takes about 200-250ms
2015-07-09 16:30:37 -06:00
9d4073ef36 master: remove simple parameter history 2015-07-09 13:54:38 +02:00
96a5d73c81 worker: split build stage from prepare 2015-07-09 13:18:12 +02:00
34aacd3c5f complete AD9914 support (no programmable modulus, untested) 2015-07-08 17:22:43 +02:00
Yann Sionneau
0109821078 tools: change asyncio_process_wait_timeout to handle cases where process.stdout is None. close #56 2015-07-07 19:30:36 +02:00
Yann Sionneau
2d343dd95d pc_rpc: AsyncioClient __do_rpc coroutine was never yielded from 2015-07-07 19:26:47 +02:00
f3e5197c14 test/coredevice/test_time_keeps_running: remove unnecessary close_devices, upper bound 2015-07-07 15:48:47 +02:00
Yann Sionneau
706bf2b4b4 pxi6733: allow usage of 2-dimensional arrays. close #66 2015-07-07 15:42:08 +02:00
8a33d8c868 never stop RTIO counter 2015-07-07 15:29:38 +02:00
Yann Sionneau
df232f5405 lda driver: add error message when no device found 2015-07-07 15:18:28 +02:00
f9d878119a pxi6733: add mediator 2015-07-05 19:07:57 +02:00
2bc8286f3f pdq2/mediator: fix arm 2015-07-05 19:07:31 +02:00
58c0150822 ttl: improve clockgen doc 2015-07-05 19:07:13 +02:00
2eeaa3b9be pxi6733: clean up docstring 2015-07-05 18:50:16 +02:00
a3fe538067 test: fix get_from_ddb 2015-07-04 22:36:23 -06:00
409c66e966 test: convert lda/tcube/409b to hardware_testbench 2015-07-04 21:44:28 -06:00
6faa8ecd51 test: split full_stack into coredevice and coredevice_vs_host
also adapt it to hardware_testbench
closes: #62
2015-07-04 20:35:02 -06:00
4cbf280f1a test: return experiment not, rdb 2015-07-04 20:05:11 -06:00
00b9368a0c language/core: add EncodedException to __all_ 2015-07-04 19:51:30 -06:00
380f498284 Merge branch 'namespace_all'
* namespace_all:
  use __all__ to structure the namespace
2015-07-04 18:38:26 -06:00
65ec6c28f4 ttl/clockgen: expose acc_width 2015-07-04 19:21:25 +02:00
abd58667b9 pxi6733: small cleanup 2015-07-04 18:49:09 +02:00
504576de58 remove unneeded import 2015-07-04 18:43:07 +02:00
753d61b38f complete support for TTL clock generator 2015-07-04 18:36:01 +02:00
a615a3830a test/coredevice: minor fixes 2015-07-04 18:35:11 +02:00
whitequark
549c110e7c Fix types.TFunction.fold. 2015-07-04 04:27:24 +03:00
whitequark
4785f0a2de Don't error out in inferencer if builtin arguments have polymorphic types. 2015-07-04 04:27:15 +03:00
whitequark
16432d2652 Implement escape analysis. 2015-07-04 04:16:37 +03:00
whitequark
4358c5c453 Unbreak return type inference. 2015-07-04 02:23:55 +03:00
whitequark
561d403ddd Add missing _loc forwarding. 2015-07-04 00:59:03 +03:00
whitequark
ee0990cb5e Automatically infer return type of NoneType for no return statements. 2015-07-04 00:58:48 +03:00
2674ed1d2d use __all__ to structure the namespace 2015-07-02 22:02:21 -06:00
whitequark
bfabca494b Remove regions from types.
Unification-based inference for regions is useful with a language
that has let bindings (which would propagate the regions) and
functions polymorphic over regions. For reasons of simplicity,
ARTIQ has neither, and making unification-based inference work would
essentially mean adding region coercions between most AST nodes,
and having every source subexpression have its own region variable,
with the appropriate subtyping relationship.

It's simpler to just keep that state outside of typedtree.
2015-07-02 22:55:12 +03:00
whitequark
0ae13ac1b9 Style fixes. 2015-07-02 22:38:55 +03:00
whitequark
7c833f0727 Move transforms.MonomorphismChecker to validators.MonomorphismValidator. 2015-07-02 21:54:31 +03:00
whitequark
02b41ea0f7 Add MonomorphismChecker. 2015-07-02 21:28:26 +03:00
whitequark
73a8f3c442 Fix tests. 2015-07-02 20:06:43 +03:00
whitequark
8a65266f14 Improve builtin call error message. 2015-07-02 20:06:07 +03:00
whitequark
196acb37f6 Add IntMonomorphizer. 2015-07-02 19:57:27 +03:00
whitequark
7ce9bdf54d Move transforms to artiq.compiler.transforms, add artiq.Module. 2015-07-02 19:35:35 +03:00
2881d5f00a gateware: add RTIO clock generator 2015-07-02 18:20:26 +02:00
whitequark
1702251ee5 Add region field to types. 2015-07-02 18:44:09 +03:00
whitequark
86cdc84f7e Initialize types.TBuiltin's attributes field. 2015-07-02 18:19:01 +03:00
74f07092c7 test/coredevice: fix timestamp conflict 2015-07-02 10:26:00 +02:00
771ad6cb26 test/coredevice: adapt to MU API 2015-07-01 22:34:49 +02:00
5ace0f8e7a Merge branch 'master' of https://github.com/m-labs/artiq 2015-07-01 22:23:10 +02:00
9d6287a6a3 expose machine units to user 2015-07-01 22:22:53 +02:00
Yann Sionneau
d7ef885d9e controllers: print+exit instead of raising exception for argparse error, better doc for --simulation
As long as you use --simulation, the driver will be in simulation mode.
Even if you specify a --device or --channels.

That can allow you to just switch to simulation mode by adding
--simulation in the device database without having to
remove the serial number or device path/name.
2015-07-01 11:54:28 +02:00
Yann Sionneau
652f3359a2 lda_controller: fix typo 2015-07-01 11:41:01 +02:00
Yann Sionneau
ffe1355b1a lda_controller: improve help message for --device argument 2015-06-29 19:24:55 +02:00
Yann Sionneau
a73776bd72 controllers: enforce the usage of either --simulation or --device 2015-06-29 19:21:32 +02:00
whitequark
6bf95397d7 Rename package py2llvm to compiler.
Since the package implements a typechecker along with a code generator,
and the typechecker will be run before or together with transformations,
this name is more descriptive.
2015-06-29 20:15:22 +03:00
Yann Sionneau
515aa96819 controllers: use --simulation for simulation 2015-06-29 13:04:01 +02:00
23eee94458 pipistrello: add notes to nist_qc1 about dds_clock
* remove xtrig from the target as it is not usually connected (used for
  dds_clock) and ignore PMT2/BTN2 as C:15 is used for dds_clock.
* this also aligns the ttl channel numbers with kc705/nist_qc1 (two pmt
  inputs followed by 16 ttl outputs followed by leds)
2015-06-28 20:56:12 -06:00
f7427dda39 test: make benchmarks unittest 2015-06-28 20:56:12 -06:00
593dafc118 test: hardware testbench 2015-06-28 20:55:59 -06:00
39e9e73ff3 language: allow experiments to import from artiq.language
this way the import stanza shows what is imported: just experiment language
related components

keep the imports also at top level until experiments have transitioned

the top level __init__.py should build and expose the entire namespace of artiq
related things, like hdf5 analysis tools, frontend components (like experiment
running api), deployment tools etc.
2015-06-28 20:52:41 -06:00
whitequark
f430bf3f63 Add support for exceptions. 2015-06-29 00:35:48 +03:00
whitequark
a4a9cd884e Add exception constructor types. 2015-06-28 22:48:15 +03:00
whitequark
9044e88983 Elaborate hierarchy of builtins. 2015-06-28 22:40:57 +03:00
944bfafefa soc: support QC2 and AD9914 (untested) 2015-06-28 21:37:27 +02:00
85c5b157a0 test/full_stack: tolerate FP rounding errors 2015-06-27 23:52:20 +02:00
7d3acf4d10 Merge branch 'master' of https://github.com/m-labs/artiq 2015-06-27 21:15:24 +02:00
07ceed9512 artiq_flash.sh: back down on verbosity 2015-06-26 11:09:26 -06:00
whitequark
ea0d11b8be Allow also passing iterables to lists. 2015-06-26 19:14:24 +03:00
whitequark
e07057c224 Add range types. 2015-06-26 18:53:20 +03:00
whitequark
71256a7109 Assignment rhs is typed before lhs. 2015-06-26 18:35:34 +03:00
c71fe29792 simplify unit system and use floats by default 2015-06-26 16:34:37 +02:00
e6a4c2fb36 dds: make it easier to specify phase 2015-06-26 12:05:11 +02:00
whitequark
7cd6011981 Add typechecking for most builtin. 2015-06-26 11:16:08 +03:00
48e0a2ad37 artiq_flash: echo commands for a bit more verbosity 2015-06-25 13:28:05 -06:00
Yann Sionneau
9c96ebf7d4 nist_qc2: add fmc adapter io file 2015-06-25 03:06:15 +02:00
whitequark
752031147d Add valid forms for builtin calls. 2015-06-24 12:16:17 +03:00
whitequark
4d407ace4b Implement prelude. 2015-06-24 11:46:15 +03:00
whitequark
710a04cbee Add builtin definitions for len(), round(), range() and syscall(). 2015-06-24 11:28:24 +03:00
whitequark
8762729e80 Add types.TBuiltin. 2015-06-24 11:24:35 +03:00
4ba8951ae1 rpc: fix indentation of class docstring 2015-06-23 19:31:52 +00:00
Yann Sionneau
71721a152e artiq_rpctool: list-methods also prints class docstring 2015-06-23 18:35:32 +02:00
8082bf14c1 Merge branch 'master' of https://github.com/m-labs/artiq 2015-06-21 07:27:47 -06:00
ef96de7d26 Merge branch 'shrink-dds-wb'
* shrink-dds-wb:
  ad9858: make wb data 8 bit wide
2015-06-21 00:10:44 -06:00
45ec5dbe84 ad9858: make wb data 8 bit wide
matches actual dds bus data width and saves bram
2015-06-20 23:53:01 -06:00
07a58dc0da wavesynth: cleanup, refactor 2015-06-20 23:29:26 -06:00
87ea1433d3 dds: all working 2015-06-20 18:42:39 -06:00
827f99e7d3 gui: more digits in DDS monitor 2015-06-19 17:55:01 -06:00
f47c2e54e1 DDS monitor fixes 2015-06-19 17:36:46 -06:00
Joe Britton
83fd5fdf16 novatech409b: add unit test 2015-06-19 15:59:23 -06:00
Joe Britton
f850336537 novatech409b: cleanup 2015-06-19 15:58:25 -06:00
5a9bdb2e33 DDS monitoring 2015-06-19 15:30:17 -06:00
Yann Sionneau
b8bb3d8ca7 manual: explain how to select TCube device from serial number 2015-06-19 17:06:50 +02:00
Yann Sionneau
4cdf1c4b81 manual: serial number explanations + udev rule for LDA 2015-06-19 16:41:44 +02:00
Yann Sionneau
988ec5c7e2 tdc/tpz driver: fix missing close method in simulated device 2015-06-19 10:40:49 +02:00
Yann Sionneau
645c65014d gui: forgot to rename one data to backing_store 2015-06-19 01:07:37 +02:00
Yann Sionneau
4d077f50c6 thorlabs tdc driver: all moves are now blocking and wait for move to end or be stopped 2015-06-19 01:02:12 +02:00
Yann Sionneau
b05972059e artiq_gui: check due date upon date selection 2015-06-18 20:44:42 +02:00
Yann Sionneau
1ad5165cc7 artiq_gui: add a search box in parameters dock 2015-06-18 20:43:53 +02:00
Yann Sionneau
77ca8bbf0f artiq_coreconfig: better arg parsing 2015-06-18 17:07:20 +02:00
Florent Kermarrec
d25a07f668 Merge branch 'master' of https://github.com/m-labs/artiq 2015-06-18 12:54:33 +02:00
Florent Kermarrec
38a0f63bd2 gateware/soc: use Minicon SDRAM controller and 128KB shared L2 cache 2015-06-18 12:18:03 +02:00
Yann Sionneau
afc70926d7 artiq_coreconfig: use subparsers for arg parsing 2015-06-17 16:40:27 +02:00
Yann Sionneau
95ff21d829 gui: add ARTIQ icon 2015-06-16 17:01:53 +02:00
Yann Sionneau
4c8917afbd artiq_flash: use BIT files instead of BIN files 2015-06-16 01:39:41 +02:00
whitequark
3adb4150f4 Fix type of Call. 2015-06-15 17:16:44 +03:00
whitequark
8c5e58f83c Implement Call. 2015-06-15 16:55:13 +03:00
whitequark
a3789868f2 More friendly artiq.py2llvm.typing testbench. 2015-06-15 15:59:36 +03:00
whitequark
20e0e69358 Add support for function types and LambdaT.
Also fix scoping of Nonlocal.
2015-06-15 11:30:50 +03:00
whitequark
dbfdbc3c22 Add check for duplicate parameter names. 2015-06-15 09:05:24 +03:00
whitequark
d27bb3168d Add support for ListComp. 2015-06-15 08:40:37 +03:00
76e034c913 protocols: add fire-and-forget RPC 2015-06-14 22:03:34 -06:00
whitequark
77adf2f6b5 Add support for With. 2015-06-14 23:13:41 +03:00
whitequark
cd22b8178c Add support for Raise. 2015-06-14 23:02:28 +03:00
whitequark
20b7a73b49 Add support for Compare. 2015-06-14 22:48:04 +03:00
whitequark
fe69c5b465 Implement BinOp coercion rules for AugAssign. 2015-06-14 13:10:32 +03:00
whitequark
7b78e7de67 Add support for BinOp. 2015-06-14 12:07:13 +03:00
whitequark
faaf189961 Add support for Attribute. 2015-06-13 13:50:56 +03:00
whitequark
23f33d7239 Invert operand should be integer. 2015-06-13 13:45:09 +03:00
whitequark
1c48874a2a Documentation. 2015-06-13 13:08:16 +03:00
whitequark
de6dff94cd GeneratorExp also includes assignment context. 2015-06-13 12:58:45 +03:00
whitequark
4b4805265d Add support for Break and Continue. 2015-06-13 12:10:30 +03:00
whitequark
55551714fa Error out on unsupported statements. 2015-06-13 11:33:38 +03:00
whitequark
4c95647162 Split ASTTypedRewriter off Inferencer. 2015-06-13 11:33:03 +03:00
whitequark
61434a8da3 Split off builtins from types.
builtins will contain attribute definitions as well.
2015-06-13 10:29:26 +03:00
whitequark
3e2d104014 Make typing.Inferencer idempotent. 2015-06-13 09:32:53 +03:00
86fbe38371 gui: DDS monitor/injection (WIP) 2015-06-12 17:41:04 +08:00
whitequark
c89bf6fae0 Add support for UnaryOp. 2015-06-12 08:59:41 +03:00
f84c51fed5 gui: do not use broken pyqtgraph addLabel method 2015-06-11 15:15:13 +08:00
whitequark
df686136f1 Separate inference and asttyped transformation.
This allows to run inference several times on the same tree,
as would be necessary when coercion nodes are added.
2015-06-11 06:34:26 +03:00
whitequark
e18ea0daae Better error reporting for List. 2015-06-11 04:36:52 +03:00