mirror of https://github.com/m-labs/artiq.git
wavesynth: refactor testing code
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1bca614d11
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051b01f58e
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@ -0,0 +1,127 @@
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import unittest
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from artiq.wavesynth import compute_samples
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class TestSynthesizer(unittest.TestCase):
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program = [
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[
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# frame 0
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{
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# frame 0, segment 0, line 0
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"dac_divider": 1,
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"duration": 100,
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"channel_data": [
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{
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# channel 0
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"dds": {"amplitude": [0.0, 0.0, 0.01],
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"phase": [0.0, 0.0, 0.0005],
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"clear": False}
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}
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],
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"wait_trigger": False,
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"jump": False
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},
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{
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# frame 0, segment 0, line 1
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"dac_divider": 1,
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"duration": 100,
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"channel_data": [
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{
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# channel 0
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"dds": {"amplitude": [49.5, 1.0, -0.01],
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"phase": [0.0, 0.05, 0.0005],
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"clear": False}
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}
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],
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"wait_trigger": False,
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"jump": True
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},
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],
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[
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# frame 1
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{
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# frame 1, segment 0, line 0
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"dac_divider": 1,
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"duration": 100,
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"channel_data": [
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{
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# channel 0
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"dds": {"amplitude": [100.0, 0.0, -0.01],
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"phase": [0.0, 0.1, -0.0005],
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"clear": False}
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}
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],
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"wait_trigger": False,
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"jump": False
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},
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{
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# frame 1, segment 0, line 1
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"dac_divider": 1,
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"duration": 100,
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"channel_data": [
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{
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# channel 0
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"dds": {"amplitude": [50.5, -1.0, 0.01],
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"phase": [0.0, 0.05, -0.0005],
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"clear": False}
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}
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],
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"wait_trigger": False,
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"jump": True
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}
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],
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[
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# frame 2
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{
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# frame 2, segment 0, line 0
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"dac_divider": 1,
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"duration": 84,
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"channel_data": [
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{
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# channel 0
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"dds": {"amplitude": [100.0],
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"phase": [0.0, 0.05],
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"clear": False}
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}
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],
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"wait_trigger": True,
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"jump": False
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},
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{
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# frame 2, segment 1, line 0
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"dac_divider": 1,
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"duration": 116,
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"channel_data": [
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{
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# channel 0
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"dds": {"amplitude": [100.0],
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"phase": [0.0, 0.05],
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"clear": True}
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}
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],
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"wait_trigger": False,
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"jump": True
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}
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]
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]
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def setUp(self):
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self.dev = compute_samples.Synthesizer(1, self.program)
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self.t = list(range(600))
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def drive(self):
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s = self.dev
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r = s.trigger(0)
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y = r[0]
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r = s.trigger(2)
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y += r[0]
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r = s.trigger()
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y += r[0]
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r = s.trigger(1)
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y += r[0]
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x = list(range(600))
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return x, y
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def test_run(self):
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x, y = self.drive()
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@ -1,8 +1,6 @@
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from copy import copy
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from math import cos, pi
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import cairoplot
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class Spline:
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def __init__(self):
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@ -108,119 +106,12 @@ class Synthesizer:
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return r
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def main():
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program = [
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[
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# frame 0
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{
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# frame 0, segment 0, line 0
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"dac_divider": 1,
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"duration": 100,
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"channel_data": [
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{
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# channel 0
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"dds": {"amplitude": [0.0, 0.0, 0.01],
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"phase": [0.0, 0.0, 0.0005],
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"clear": False}
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}
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],
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"wait_trigger": False,
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"jump": False
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},
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{
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# frame 0, segment 0, line 1
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"dac_divider": 1,
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"duration": 100,
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"channel_data": [
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{
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# channel 0
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"dds": {"amplitude": [49.5, 1.0, -0.01],
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"phase": [0.0, 0.05, 0.0005],
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"clear": False}
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}
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],
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"wait_trigger": False,
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"jump": True
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},
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],
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[
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# frame 1
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{
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# frame 1, segment 0, line 0
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"dac_divider": 1,
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"duration": 100,
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"channel_data": [
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{
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# channel 0
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"dds": {"amplitude": [100.0, 0.0, -0.01],
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"phase": [0.0, 0.1, -0.0005],
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"clear": False}
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}
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],
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"wait_trigger": False,
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"jump": False
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},
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{
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# frame 1, segment 0, line 1
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"dac_divider": 1,
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"duration": 100,
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"channel_data": [
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{
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# channel 0
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"dds": {"amplitude": [50.5, -1.0, 0.01],
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"phase": [0.0, 0.05, -0.0005],
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"clear": False}
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}
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],
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"wait_trigger": False,
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"jump": True
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}
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],
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[
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# frame 2
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{
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# frame 2, segment 0, line 0
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"dac_divider": 1,
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"duration": 84,
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"channel_data": [
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{
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# channel 0
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"dds": {"amplitude": [100.0],
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"phase": [0.0, 0.05],
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"clear": False}
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}
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],
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"wait_trigger": True,
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"jump": False
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},
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{
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# frame 2, segment 1, line 0
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"dac_divider": 1,
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"duration": 116,
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"channel_data": [
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{
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# channel 0
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"dds": {"amplitude": [100.0],
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"phase": [0.0, 0.05],
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"clear": True}
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}
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],
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"wait_trigger": False,
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"jump": True
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}
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]
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]
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from artiq.test.wavesynth import TestSynthesizer
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import cairoplot
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x = list(range(600))
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s = Synthesizer(1, program)
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r = s.trigger(0)
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y = r[0]
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r = s.trigger(2)
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y += r[0]
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r = s.trigger()
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y += r[0]
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r = s.trigger(1)
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y += r[0]
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t = TestSynthesizer()
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t.setUp()
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x, y = t.drive()
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cairoplot.scatter_plot("plot.png", [x, y])
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if __name__ == "__main__":
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