M-Labs/artiq
2
0
Fork 2
mirror of https://github.com/m-labs/artiq.git synced 2024-12-25 11:18:27 +08:00
Code Issues Projects Releases Wiki Activity

test/pdq2: don't write vcd

Browse Source
This commit is contained in:
Robert Jördens 2015-04-11 17:03:05 -06:00
parent 066adbdeac
commit bc1acef355
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
artiq/test/pdq2.py
View File

@ -47,7 +47,7 @@ class TestPdq2(unittest.TestCase):
buf = self.test_cmd_program()
tb = Pdq2Sim(buf)
tb.ctrl_pads.trigger.reset = 0
run_simulation(tb, vcd_name="pdq2.vcd", ncycles=len(buf) + 250)
run_simulation(tb, ncycles=len(buf) + 250)
delays = 7, 10, 30
y = list(zip(*tb.outputs[len(buf) + 130:]))
y = list(zip(*(yi[di:] for yi, di in zip(y, delays))))