Commit Graph

282 Commits

Author SHA1 Message Date
957645a7e7 examples: move kasli tester out of kasli_basic 2018-08-09 18:07:44 +08:00
bbc98410e4 test: dds → ad9914dds
Prevent confusion with Urukul.
2018-08-09 16:55:09 +08:00
a061ba2505 grabber/kasli_basic: add grabber test
close #1121
2018-08-08 12:43:44 +02:00
8b8e1844f0 kasli_sawgmaster: roughly match Urukul and Sayma amplitudes 2018-08-07 20:07:21 +08:00
9ce6233926 kasli: fix SYSU TTL directions 2018-08-07 19:29:28 +08:00
8aa88cfe70 kasli_sawgmaster: add Urukul-Sayma example 2018-08-07 19:29:28 +08:00
65f198bdee kasli: use tester EEMs for DRTIO, add Urukul-Sayma sync example 2018-08-06 16:53:13 +08:00
d152506ecb sayma: update fmcdio_vhdci_eem demo 2018-07-19 15:47:20 +08:00
31f4f8792a sayma: add Urukul and Zotino to example device_db 2018-07-18 10:31:55 +08:00
5e62910a8d examples: add Sayma VHDCI DIO 2018-07-17 23:28:05 +08:00
82145b1263 examples: sayma_drtio → sayma_masterdac 2018-07-17 20:32:30 +08:00
3168b193e6 kc705: remove Zotino and Urukul
* use Kasli instead for using EEMs
* code required outdated VHDCI adapter 1.0
2018-07-17 17:48:57 +08:00
4420046502 kasli_tester: support mixed AD9910/AD9912 systems 2018-07-06 15:43:38 +08:00
ac3f360c26 kasli_tester: fix AD9912 support 2018-07-06 15:43:25 +08:00
509562ddbf kasli: add WIPM target 2018-07-06 15:41:28 +08:00
0483b8d14c sayma_drtio: ditto 2018-06-28 17:03:32 +08:00
04d6ff45c8 kasli_sawgmaster: reset SAWGs
Most importantly this resets the phase accumulators.
2018-06-28 17:01:48 +08:00
51a5d8dff9 examples: add Kasli SAWG master 2018-06-22 18:57:49 +08:00
83428961ad sayma: add SAWG and JESD to DRTIO master 2018-06-22 00:04:22 +08:00
5a91f820fd examples: change Sayma sines frequency to 9MHz
Well within Red Pitaya bandwidth.
2018-06-20 22:40:07 +08:00
9288301543 examples: add DRTIO sines 2018-06-20 22:39:40 +08:00
4803ca3799 examples/sayma_drtio: add SAWG channels 2018-06-19 23:50:26 +08:00
cae92f9b44 kasli: add Tsinghua variant 2018-06-06 19:03:45 +08:00
62deffa7d2 opticlock: fix core device name 2018-06-01 15:39:23 +00:00
f50aef1a22 suservo: extract boilerplate
closes #1041
2018-06-01 15:37:07 +00:00
2c344686d9 ad53xx/zotino: enable overtemp shutdown and readback control 2018-06-01 13:06:52 +00:00
87d3ac9d25 suservo: swap transfer function parametrization
The integrator is now parametrized through its gain and not the PI
corner frequency. The integrator gain limit is given in absolute gain
units and not relative to the proportional gain.

close #1033
2018-06-01 09:38:18 +00:00
8fd57e6ccb kasli_tester: add Sampler and Zotino support 2018-05-29 22:36:42 +08:00
ad099edf63 kasli: integrate grabber 2018-05-28 22:43:40 +08:00
c2890c6cf0 kasli_tester: initialize DDS channels 2018-05-28 14:24:39 +08:00
4d3f763865 move kasli_opticlock to kasli_basic 2018-05-28 11:02:44 +08:00
b09d07905c kasli: add LUH/PTB/HUB variants
and refactor/simplify variant selection
2018-05-27 18:33:27 +00:00
fcd12e3472 suservo: work around #1007 2018-05-22 17:36:41 +00:00
4e5fe672e7 kasli: add tester target 2018-05-21 17:43:39 +08:00
2e6b81d59a kasli_tester: reset core device 2018-05-21 15:35:29 +08:00
8513f0b0d4 minor cleanup 2018-05-21 15:35:00 +08:00
f953bee79e kasli_test: add RF switch control 2018-05-18 23:48:29 +08:00
f457b59985 kasli_tester: bail out when run from ARTIQ master 2018-05-18 23:30:52 +08:00
3cbcb3bff6 move mitll, sysu and ustc device_dbs to kasli_basic 2018-05-18 23:20:40 +08:00
bdfd993818 kasli_tester: add Urukul support 2018-05-18 23:18:03 +08:00
9a4408a570 add Kasli TTL tester 2018-05-18 22:52:53 +08:00
37bd0c2566 kasli: add USTC target 2018-05-18 16:15:07 +08:00
73f8e61478 kasli_sysu: fix TTL directions in example device_db 2018-05-18 16:13:50 +08:00
a100c73dfe suservo: support pure-I 2018-05-14 18:48:27 +00:00
0c1caf0744 suservo: clean up and beautify example 2018-05-14 15:22:47 +02:00
504d37b66b suservo: add SI units functions and document
m-labs/artiq#788
2018-05-14 12:26:49 +00:00
3027951dd8 integrate new AD9914 driver
moninj, analyzer, docs, examples, tests.
2018-05-13 23:29:35 +08:00
f055bf88f6 suservo: add clip flags (#992) 2018-05-09 07:16:15 +00:00
8812824fb2 suservo: speed up example, interlock mem 2018-04-27 17:17:17 +00:00
5f00326c65 suservo: coeff mem write port READ_FIRST 2018-04-27 15:43:32 +00:00
73fa572275 suservo: documentation, small API changes 2018-04-27 16:53:22 +02:00
fe9834bac4 suservo: update 'technology preview' example [wip]
Still with mostly undocumented and unstable API.
2018-04-27 12:04:17 +00:00
307cd07b9d suservo: lots of gateware/ runtime changes
tested/validated:

* servo enable/disable
* dds interface, timing, io_update, mask_nu
* channel control (en_out, en_iir, profile)
* profile configuration (coefficients, delays, offsets, channel)
* adc timings and waveforms measured
* asf state readback
* adc readback

individual changes below:

suservo: correct rtio readback

suservo: example, device_db [wip]

suservo: change rtio channel layout

suservo: mem ports in rio domain

suservo: sck clocked from rio_phy

suservo: cleanup, straighten out timing

suservo: dds cs polarity

suservo: simplify pipeline

suservo: drop unused eem names

suservo: decouple adc SR from IIR

suservo: expand coredevice layer

suservo: start the correct stage

suservo: actually load ctrl

suservo: refactor/tweak adc timing

suservo: implement cpld and dds init
2018-04-27 13:50:26 +02:00
8a1151b54f suservo: example device db 2018-04-25 17:14:25 +00:00
4fe09fddd5 examples/kc705_nist_clock: update to new ad53xx driver 2018-04-22 15:03:30 +08:00
48b48e44dd kasli/mitll: fix demo 2018-04-17 20:15:38 +08:00
79f4892e22 kasli/mitll: fix RTIO channel numbers 2018-04-17 20:15:17 +08:00
eac447278f kasli: add MITLL variant 2018-04-17 19:00:11 +08:00
8d62ea2288 examples: fix KC705 ad53xx 2018-03-25 11:19:54 +08:00
a20dfd9c00 examples/master: ad5360 -> zotino 2018-03-24 16:46:59 +01:00
0505e9124f kc705: port device_db, ad53xx/zotino example 2018-03-24 16:05:26 +01:00
68e433a3a8 opticlock/device_db: resurrect novogorny
deleted in a992a67
2018-03-24 13:46:45 +01:00
hartytp
a992a672d9 coredevice/zotino: add (#969)
* Replace ad5360 driver with a ad53xx driver, designed to have a nicer interface
Add Zotino driver and add to opticlock target for Kasli
Test Zotino on hw:
 - Verify all timings on the hardware with a scope
 - Verify that we can correctly set and read back all registers in a loop (checks for SI and driver issues)
 - check we can set LEDs correctly
 - check calibration routine + all si unit functions with a good DVM
 - look at DAC transitions on a scope (while triggering of a TTL) on persist to check there are no LDAC glitches etc
To do: update examples and e.g. KC705 device db.
2018-03-24 13:41:18 +01:00
770b0a7b79 novogorny: conv -> cnv
* parity with sampler
* also add novogorny device to opticlock
2018-03-21 18:38:42 +00:00
12d699f2a8 suservo: add sampler example 2018-03-21 12:21:53 +00:00
f5a1001114 suservo: add device database and artiq_flash variant 2018-03-21 08:53:26 +00:00
37f5f0d38d examples: add DMA to Sayma DRTIO 2018-03-09 00:49:24 +08:00
8bd85caafb examples: fix Sayma DRTIO ref_period 2018-03-08 15:09:33 +08:00
5e074f83ac examples: update kasli sysu 2018-03-02 16:05:12 +08:00
a9daaad77b kasli: add SYSU variant and device_db 2018-03-02 14:44:31 +08:00
a7720d05cd firmware, sayma: port converter_spi to spi2
* ksupport/nrt_bus
* port ad9154, hmc830, hmc7043
* port local_spi and drtio_spi
* port kernel_proto libdrtioaux, satman
* change sayma_rtm gateware over
* add spi2 NRTSPIMaster
* remove spi NRTSPIMaster
* change sayma device_db
* change HMC830 to open mode and explicitly sequence open mode
2018-03-01 11:19:18 +01:00
f97163cdee examples/master: sync device_db with kc705_nist_clock 2018-02-27 19:40:00 +01:00
whitequark
916b10ca94 examples: spi → spi2. 2018-02-27 18:36:45 +00:00
760724c500 kasli/device_db: fix i2c switch addr 2018-02-26 11:37:12 +01:00
771bf87b56 kc705: port amc101_dac/spi0 and sma_spi to spi2 2018-02-22 17:19:51 +01:00
d4a10dcbd4 urukul: fix example 2018-02-22 11:28:50 +01:00
f8e6b4f4e3 ad5360: port to spi2
* kc705 nist_clock target gateware
* coredevice driver
* moninj code
* test/example/device_db

This is untested as we don't have a AD5360 board right now.
Will be tested with Zotino v1.1

m-labs/artiq#926
2018-02-22 10:25:46 +01:00
0d8145084d test_spi: move to new spi2 core 2018-02-21 19:41:05 +01:00
a63fd306af urukul: use spi2
* switch kc705 and kasli targets to spi2 gateware on urukul
* rewrite urukul, ad9912, ad9910
* update example experiments, device_dbs
2018-02-21 15:00:28 +00:00
01fa6c1c2e reorganize examples 2018-02-19 15:46:08 +08:00
7002bea0ab kasli: clean up urukul example more 2018-02-15 14:21:17 +01:00
b6395a809b kasli: remove old urukul test code 2018-02-13 22:16:57 +01:00
be693bc8a9 opticlock: examples 2018-02-13 22:13:40 +01:00
e67a289e2b examples: add SAWG sines (DAC synchronization test) 2018-02-13 20:02:51 +08:00
6f90a43df2 examples: reorganize for new hardware 2018-01-28 02:11:45 +08:00
cb0016ceee examples/sayma: fix ref_multiplier
SAWG is working, whoohoo!
2018-01-23 15:26:03 +08:00
74b7baa8c5 urukul example: mmcx clock input 2018-01-22 20:30:08 +01:00
a86b28def2 urukul: example additions
* relax timings for faster spi xfers
* continuous readback test to explore spi speed limit
2018-01-22 20:29:30 +01:00
whitequark
bfceef439f Add missing parts of f317d1a2. 2018-01-17 01:14:16 +00:00
dc593ec0f0 Merge branch 'rtio-sed' into sed-merge 2018-01-10 12:04:54 +08:00
67746cc7a0 urukul: raise instead of assert, clean up 2018-01-03 19:22:36 +00:00
e3d66d286d urukul: ad9910 examples 2018-01-03 18:43:04 +00:00
d8dbab024d urukul: don't deal with dds_reset for now 2018-01-03 18:43:04 +00:00
e8608d12f5 device_db.py: whitespace 2018-01-03 18:43:04 +00:00
a940550e47 urukul: add CPLD and AD9912 driver [wip] 2018-01-02 19:59:24 +01:00
94b84ebe7c kc705_dds: add urukul spi/ttl channels 2018-01-02 13:20:48 +01:00
69d7e93e99 drtio: adapt examples to Sayma 2017-12-21 23:09:19 +08:00
4fbc8772a5 sayma: allocate all user LEDs to RTIO, make one TTL SMA input 2017-12-21 19:27:38 +08:00
2e74ce25d8 examples/sayma: make LED blink pattern more peculiar 2017-12-14 19:10:34 +08:00
100c2b1769 add Sayma LED blinker example 2017-12-14 18:49:50 +08:00