forked from M-Labs/artiq
parent
4993ceec35
commit
504d37b66b
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@ -1,9 +1,6 @@
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from artiq.language.core import kernel, delay, portable, now_mu, delay_mu
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from artiq.language.units import us, ms
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from artiq.language.core import kernel, delay, now_mu, delay_mu
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from artiq.language.units import us, ns
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from artiq.coredevice.rtio import rtio_output, rtio_input_data
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from numpy import int32, int64
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from artiq.coredevice import spi2 as spi
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from artiq.coredevice import urukul, sampler
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@ -14,6 +11,8 @@ WE = 1 << COEFF_DEPTH + 1
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STATE_SEL = 1 << COEFF_DEPTH
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CONFIG_SEL = 1 << COEFF_DEPTH - 1
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CONFIG_ADDR = CONFIG_SEL | STATE_SEL
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F_CYCLE = 1/((2*(8 + 64) + 2 + 1)*8*ns)
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COEFF_SHIFT = 11
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class SUServo:
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@ -49,7 +48,7 @@ class SUServo:
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This method does not alter the profile configuration memory
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or the channel controls.
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"""
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self.set_config(0)
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self.set_config(enable=0)
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delay(3*us) # pipeline flush
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self.pgia.set_config_mu(
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@ -118,13 +117,16 @@ class SUServo:
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@kernel
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def get_adc_mu(self, adc):
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"""Get an ADC reading (IIR filter input X0).
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"""Get an ADC reading (IIR filter input X0) in machine units.
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This method does not advance the timeline but consumes all slack.
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:param adc: ADC channel number (0-7)
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:return: 16 bit signed Y0
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:return: 17 bit signed X0
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"""
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# State memory entries are 25 bits. Due to the pre-adder dynamic
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# range, X0/X1/OFFSET are only 24 bits. Finally, the RTIO interface
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# only returns the 18 MSBs (the width of the coefficient memory).
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return self.read(STATE_SEL | (adc << 1) | (1 << 8))
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@kernel
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@ -144,11 +146,24 @@ class SUServo:
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self.gains = gains
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@kernel
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def get_adc(self, adc):
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raise NotImplementedError # FIXME
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def get_adc(self, channel):
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"""Get an ADC reading (IIR filter input X0).
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This method does not advance the timeline but consumes all slack.
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:param adc: ADC channel number (0-7)
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:return: ADC voltage
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"""
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val = (self.get_adc_mu(channel) >> 1) & 0xffff
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mask = 1 << 15
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val = -(val & mask) + (val & ~mask)
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gain = (self.gains >> (channel*2)) & 0b11
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return sampler.adc_mu_to_volt(val, gain)
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class Channel:
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"""SU-Servo channel"""
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kernel_invariants = {"channel", "core", "servo", "servo_channel"}
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def __init__(self, dmgr, channel, servo_device,
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@ -165,6 +180,9 @@ class Channel:
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"""Operate channel.
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This method does not advance the timeline.
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Output RF switch setting takes effect immediately.
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IIR updates take place once the RF switch has been enabled for the
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configured delay and the profile setting has been stable.
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:param en_out: RF switch enable
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:param en_iir: IIR updates enable
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@ -174,54 +192,154 @@ class Channel:
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en_out | (en_iir << 1) | (profile << 2))
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@kernel
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def set_dds_mu(self, profile, ftw, offset, pow=0):
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"""Set profile DDS coefficients.
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def set_dds_mu(self, profile, ftw, offs, pow_=0):
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"""Set profile DDS coefficients in machine units.
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This method advances the timeline by four Servo memory accesses.
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.. seealso:: :meth:`set_amplitude`
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:param profile: Profile number (0-31)
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:param ftw: Frequency tuning word (32 bit unsigned)
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:param offset: IIR offset (setpoint)
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:param pow: Phase offset word (16 bit unsigned)
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:param offs: IIR offset (17 bit signed)
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:param pow_: Phase offset word (16 bit)
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"""
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base = (self.servo_channel << 8) | (profile << 3)
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self.servo.write(base + 0, ftw >> 16)
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self.servo.write(base + 6, ftw)
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self.servo.write(base + 4, offset)
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self.servo.write(base + 2, pow)
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self.servo.write(base + 4, offs)
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self.servo.write(base + 2, pow_)
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@kernel
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def set_dds(self, profile, frequency, offset, phase=0.):
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raise NotImplementedError # FIXME
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@kernel
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def set_iir_mu(self, profile, adc, a1, b0, b1, delay=0):
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"""Set profile IIR coefficients.
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"""Set profile DDS coefficients.
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This method advances the timeline by four Servo memory accesses.
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Profile parameter changes are not synchronized. Activate a different
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profile or stop the servo to ensure synchronous changes.
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:param profile: Profile number (0-31)
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:param adc: ADC channel to use (0-7)
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:param frequency: DDS frequency in Hz
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:param offset: IIR offset (negative setpoint) in units of full scale.
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For positive ADC voltages as setpoints, this should be negative.
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:param phase: DDS phase in turns
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"""
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if self.servo_channel < 4:
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dds = self.servo.dds0
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else:
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dds = self.servo.dds1
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ftw = dds.frequency_to_ftw(frequency)
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pow_ = dds.turns_to_pow(phase)
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offs = int(round(offset*(1 << COEFF_WIDTH - 1)))
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self.set_dds_mu(profile, ftw, offs, pow_)
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@kernel
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def set_iir_mu(self, profile, adc, a1, b0, b1, dly=0):
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"""Set profile IIR coefficients in machine units.
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The recurrence relation is (all data signed and MSB aligned):
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.. math::
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a_0 y_n = a_1 y_{n - 1} + b_0 (x_n + o)/2 + b_1 (x_{n - 1} + o)/2
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Where:
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* :math:`y_n` and :math:`y_{n-1}` are the current and previous
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filter outputs, clipped to :math:`[0, 1]`.
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* :math:`x_n` and :math:`x_{n-1}` are the current and previous
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filter inputs
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* :math:`o` is the offset
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* :math:`a_0` is the normalization factor :math:`2^{11}`
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* :math:`a_1` is the feedback gain
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* :math:`b_0` and :math:`b_1` are the feedforward gains for the two
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delays
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.. seealso:: :meth:`set_iir`
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:param profile: Profile number (0-31)
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:param adc: ADC channel to take IIR input from (0-7)
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:param a1: 18 bit signed A1 coefficient (Y1 coefficient,
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feedback, integrator gain)
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:param b0: 18 bit signed B0 coefficient (recent,
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X0 coefficient, feed forward, proportional gain)
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:param b1: 18 bit signed B1 coefficient (old,
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X1 coefficient, feed forward, proportional gain)
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:param delay: Number of Servo cycles (~1.1 µs each) to suppress
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IIR updates for after either (1) enabling or disabling RF output,
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(2) enabling or disabling IIR updates, or (3) setting the active
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profile number: i.e. after invoking :meth:`set`.
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:param dly: IIR update suppression time. In units of IIR cycles
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(~1.1 µs)
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"""
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base = (self.servo_channel << 8) | (profile << 3)
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self.servo.write(base + 3, adc | (dly << 8))
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self.servo.write(base + 1, b1)
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self.servo.write(base + 3, adc | (delay << 8))
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self.servo.write(base + 5, a1)
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self.servo.write(base + 7, b0)
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@kernel
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def set_iir(self, profile, adc, i_gain, p_gain, delay=0.):
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raise NotImplementedError # FIXME
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def set_iir(self, profile, adc, gain, corner=0., limit=0., delay=0.):
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"""Set profile IIR coefficients.
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This method advances the timeline by four Servo memory accesses.
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Profile parameter changes are not synchronized. Activate a different
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profile or stop the servo to ensure synchronous changes.
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Gains are given in units of output full per scale per input full scale.
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The transfer function is (up to time discretization and
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coefficient quantization errors):
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.. math::
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H(s) = K \\frac{1 + \\frac{s}{\\omega_0}}
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{\\frac{1}{g} + \\frac{s}{\\omega_0}}
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Where:
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* :math:`s = \\sigma + i\\omega` is the complex frequency
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* :math:`K` is the proportional gain
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* :math:`\\omega_0` is the integrator corner frequency
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* :math:`g` is the integrator gain limit
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:param profile: Profile number (0-31)
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:param adc: ADC channel to take IIR input from (0-7)
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:param gain: Proportional gain (1). This is usually negative (closed
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loop, positive ADC voltage, positive setpoint).
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:param corner: Integrator corner frequency (Hz). When 0 (the default)
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this implements a pure P controller.
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:param limit: Integrator gain limit (1). When 0 (the default) the
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integrator gain limit is infinite.
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:param delay: Delay (in seconds) before allowing IIR updates after
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invoking :meth:`set`.
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"""
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B_NORM = 1 << COEFF_SHIFT + 1
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A_NORM = 1 << COEFF_SHIFT
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PI_TS = 3.1415927/F_CYCLE
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COEFF_MAX = 1 << COEFF_WIDTH - 1
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k = B_NORM*gain
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if corner == 0.:
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a1_ = 0
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b0_ = int(round(k))
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b1_ = 0
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else:
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q = PI_TS*corner
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kq = k*q
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a1_ = A_NORM
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b0 = kq + k
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b1 = kq - k
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if limit != 0.:
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ql = q/limit
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qlr = 1./(1. + ql)
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a1_ = int(round(a1_*(1. - ql)*qlr))
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b0 *= qlr
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b0 *= qlr
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b0_ = int(round(b0))
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b1_ = int(round(b1))
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if b1_ == -b0_:
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raise ValueError("low corner, gain, limit")
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if (b0_ >= COEFF_MAX or b0_ < -COEFF_MAX or
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b1_ >= COEFF_MAX or b1_ < -COEFF_MAX):
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raise ValueError("high corner, gain, limit")
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dly = int(round(delay*F_CYCLE))
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self.set_iir_mu(profile, adc, a1_, b0_, b1_, dly)
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@kernel
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def get_profile_mu(self, profile, data):
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@ -231,6 +349,7 @@ class Channel:
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`[ftw >> 16, b1, pow, adc | (delay << 8), offset, a1, ftw, b0]`.
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This method advances the timeline by 32 µs and consumes all slack.
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Profile data is returned
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:param profile: Profile number (0-31)
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:param data: List of 8 integers to write the profile data into
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@ -242,7 +361,7 @@ class Channel:
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@kernel
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def get_y_mu(self, profile):
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"""Get a profile's IIR state (filter output, Y0).
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"""Get a profile's IIR state (filter output, Y0) in machine units.
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The IIR state is also know as the "integrator", or the DDS amplitude
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scale factor. It is 18 bits wide and unsigned.
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@kernel
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def get_y(self, profile):
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raise NotImplementedError # FIXME
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"""Get a profile's IIR state (filter output, Y0).
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The IIR state is also know as the "integrator", or the DDS amplitude
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scale factor. It is 18 bits wide and unsigned.
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This method does not advance the timeline but consumes all slack.
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:param profile: Profile number (0-31)
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:return: IIR filter output in Y0 units of full scale
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"""
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return self.get_y_mu(profile)*(1./(1 << COEFF_WIDTH - 1))
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@kernel
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def set_y_mu(self, profile, y):
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"""Set a profile's IIR state (filter output, Y0) in machine units.
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The IIR state is also know as the "integrator", or the DDS amplitude
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scale factor. It is 18 bits wide and unsigned.
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This method must not be used when the Servo
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could be writing to the same location. Either deactivate the profile,
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or deactivate IIR updates, or disable Servo iterations.
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This method advances the timeline by one Servo memory access.
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:param profile: Profile number (0-31)
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:param y: 17 bit unsigned Y0
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"""
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# State memory is 25 bits wide and signed.
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# Reads interact with the 18 MSBs (coefficient memory width)
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self.servo.write(STATE_SEL | (self.servo_channel << 5) | profile, y)
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@kernel
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def set_y(self, profile, y):
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"""Set a profile's IIR state (filter output, Y0).
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The IIR state is also know as the "integrator", or the DDS amplitude
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@ -272,11 +421,6 @@ class Channel:
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This method advances the timeline by one Servo memory access.
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:param profile: Profile number (0-31)
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:param y: 18 bit unsigned Y0
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:param y: IIR state in units of full scale
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"""
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return self.servo.write(
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STATE_SEL | (self.servo_channel << 5) | profile, y)
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@kernel
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def set_y(self, profile, y):
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raise NotImplementedError # FIXME
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self.set_y_mu(profile, int(round((1 << COEFF_WIDTH - 1)*y)))
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@ -10,40 +10,47 @@ class SUServo(EnvExperiment):
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self.setattr_device("suservo0_ch{}".format(i))
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def run(self):
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# self.led()
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self.init()
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def p(self, d):
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for name, value in zip("ftw1 b1 pow cfg offset a1 ftw0 b0".split(), d):
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print(name, hex(value))
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mask = 1 << 18 - 1
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for name, val in zip("ftw1 b1 pow cfg offset a1 ftw0 b0".split(), d):
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val = -(val & mask) + (val & ~mask)
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print(name, hex(val), val)
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@rpc(flags={"async"})
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def p1(self, adc, asf, st):
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print("{:10s}".format("#"*int(adc*10)))
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@kernel
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def init(self):
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self.core.break_realtime()
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self.core.reset()
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self.led()
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self.suservo0.init()
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delay(1*us)
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# ADC PGIA gain
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self.suservo0.set_pgia_mu(0, 0)
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for i in range(8):
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self.suservo0.set_pgia_mu(i, 0)
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delay(10*us)
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# DDS attenuator
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self.suservo0.cpld0.set_att_mu(0, 64)
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self.suservo0.cpld0.set_att(0, 10.)
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delay(1*us)
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# Servo is done
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# Servo is done and disabled
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assert self.suservo0.get_status() & 0xff == 2
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delay(10*us)
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# set up profile 0 on channel 0
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self.suservo0_ch0.set_y_mu(0, 0)
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self.suservo0_ch0.set_iir_mu(
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profile=0, adc=0, a1=-0x800, b0=0x1000, b1=0, delay=0)
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delay(10*us)
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self.suservo0_ch0.set_dds_mu(
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profile=0, ftw=0x12345667, offset=0x1000, pow=0xaa55)
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delay(100*us)
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self.suservo0_ch0.set_y(0, 0.)
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self.suservo0_ch0.set_iir(
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profile=0, adc=7, gain=-.1, corner=7000*Hz, limit=0., delay=0.)
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self.suservo0_ch0.set_dds(
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profile=0, offset=-.5, frequency=71*MHz, phase=0.)
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# enable channel
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self.suservo0_ch0.set(en_out=1, en_iir=1, profile=0)
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# enable servo iterations
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self.suservo0.set_config(1)
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self.suservo0.set_config(enable=1)
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# read back profile data
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data = [0] * 8
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@ -51,40 +58,26 @@ class SUServo(EnvExperiment):
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self.p(data)
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delay(10*ms)
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# check servo status
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assert self.suservo0.get_status() & 0xff == 1
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# check servo enabled
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assert self.suservo0.get_status() & 0x01 == 1
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delay(10*us)
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# reach back ADC data
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assert self.suservo0.get_adc_mu(0) == 0
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delay(10*us)
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# read out IIR data
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assert self.suservo0_ch0.get_y_mu(0) == 0x1ffff
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delay(10*us)
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assert self.suservo0.get_status() & 0xff00 == 0x0100
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delay(10*us)
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# repeatedly clear the IIR state/integrator
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# with the ADC yielding 0's and given the profile configuration,
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# this will lead to a slow ram up of the amplitude over about 40µs
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# followed by saturation and repetition.
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while True:
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self.suservo0_ch0.set(1, 0, 0)
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delay(1*us)
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assert self.suservo0.get_status() & 0xff00 == 0x0100
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self.suservo0.set_config(0)
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delay(10*us)
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assert self.suservo0.get_status() & 0xff00 == 0x0000
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v = self.suservo0.get_adc(7)
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delay(30*us)
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w = self.suservo0_ch0.get_y(0)
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delay(20*us)
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x = self.suservo0.get_status()
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delay(10*us)
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self.suservo0_ch0.set_y_mu(0, 0)
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delay(1*us)
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self.suservo0_ch0.set(1, 1, 0)
|
||||
delay(60*us)
|
||||
self.suservo0.set_config(1)
|
||||
self.p1(v, w, x)
|
||||
delay(200*ms)
|
||||
|
||||
@kernel
|
||||
def led(self):
|
||||
self.core.break_realtime()
|
||||
for i in range(10):
|
||||
for i in range(3):
|
||||
self.led0.pulse(.1*s)
|
||||
delay(.1*s)
|
||||
|
|
|
@ -191,8 +191,8 @@ class IIR(Module):
|
|||
ADC: input value from the ADC
|
||||
ASF: output amplitude scale factor to DDS
|
||||
OFFSET: setpoint
|
||||
A0: fixed factor
|
||||
A1/B0/B1: coefficients
|
||||
A0: fixed factor (normalization)
|
||||
A1/B0/B1: coefficients (integers)
|
||||
|
||||
B0 --/- A0: 2^11
|
||||
18 | |
|
||||
|
|
|
@ -11,6 +11,7 @@ class Servo(Module):
|
|||
self.submodules.iir = IIR(iir_p)
|
||||
self.submodules.dds = DDS(dds_pads, dds_p)
|
||||
|
||||
# adc channels are reversed on Sampler
|
||||
for i, j, k, l in zip(reversed(self.adc.data), self.iir.adc,
|
||||
self.iir.dds, self.dds.profile):
|
||||
self.comb += j.eq(i), l.eq(k)
|
||||
|
|
Loading…
Reference in New Issue