forked from M-Labs/artiq
suservo: add clip flags (#992)
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@ -109,8 +109,10 @@ class SUServo:
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"""Get current SU Servo status.
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This method does not advance the timeline but consumes all slack.
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This method returns and clears the clip indicator for all channels.
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:return: Status. Bit 0: enabled, bit 1: done
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:return: Status. Bit 0: enabled, bit 1: done,
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bits 8-15: channel clip indicators.
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"""
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return self.read(CONFIG_ADDR)
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@ -29,7 +29,8 @@ class SUServo(EnvExperiment):
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# DDS attenuator
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self.suservo0.cpld0.set_att_mu(0, 64)
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delay(1*us)
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assert self.suservo0.get_status() == 2
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# Servo is done
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assert self.suservo0.get_status() & 0xff == 2
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delay(10*us)
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# set up profile 0 on channel 0
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@ -51,16 +52,19 @@ class SUServo(EnvExperiment):
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delay(10*ms)
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# check servo status
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assert self.suservo0.get_status() == 1
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assert self.suservo0.get_status() & 0xff == 1
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delay(10*us)
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# reach back ADC data
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print(self.suservo0.get_adc_mu(0))
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delay(10*ms)
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assert self.suservo0.get_adc_mu(0) == 0
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delay(10*us)
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# read out IIR data
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print(self.suservo0_ch0.get_y_mu(0))
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delay(10*ms)
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assert self.suservo0_ch0.get_y_mu(0) == 0x1ffff
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delay(10*us)
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assert self.suservo0.get_status() & 0xff00 == 0x0100
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delay(10*us)
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# repeatedly clear the IIR state/integrator
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# with the ADC yielding 0's and given the profile configuration,
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@ -69,6 +73,10 @@ class SUServo(EnvExperiment):
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while True:
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self.suservo0_ch0.set(1, 0, 0)
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delay(1*us)
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assert self.suservo0.get_status() & 0xff00 == 0x0100
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delay(10*us)
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assert self.suservo0.get_status() & 0xff00 == 0x0000
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delay(10*us)
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self.suservo0_ch0.set_y_mu(0, 0)
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delay(1*us)
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self.suservo0_ch0.set(1, 1, 0)
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@ -58,9 +58,11 @@ class RTServoMem(Module):
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config = Signal(w.coeff, reset=0)
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status = Signal(w.coeff)
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pad = Signal(6)
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self.comb += [
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Cat(servo.start).eq(config),
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status.eq(Cat(servo.start, servo.done))
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status.eq(Cat(servo.start, servo.done, pad,
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[_.clip for _ in servo.iir.ctrl]))
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]
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assert len(self.rtlink.o.address) == (
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@ -108,6 +110,9 @@ class RTServoMem(Module):
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self.sync.rio_phy += [
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If(self.rtlink.o.stb & we & state_sel & config_sel,
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config.eq(self.rtlink.o.data)
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),
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If(read & read_config & read_state,
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[_.clip.eq(0) for _ in servo.iir.ctrl]
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)
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]
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self.comb += [
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@ -238,6 +238,7 @@ class IIR(Module):
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("profile", w.profile),
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("en_out", 1),
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("en_iir", 1),
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("clip", 1),
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("stb", 1)])
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for i in range(1 << w.channel)]
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# only update during ~loading
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@ -266,6 +267,7 @@ class IIR(Module):
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profiles = Array([ch.profile for ch in self.ctrl])
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en_outs = Array([ch.en_out for ch in self.ctrl])
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en_iirs = Array([ch.en_iir for ch in self.ctrl])
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clips = Array([ch.clip for ch in self.ctrl])
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# state counter
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state = Signal(w.channel + 2)
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@ -443,8 +445,10 @@ class IIR(Module):
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en_out.eq(en_outs[channel[0]]),
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en_iir.eq(en_iirs[channel[0]]),
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If(stage[1],
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ddss[channel[1]][:w.word].eq(
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m_coeff.dat_r),
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ddss[channel[1]][:w.word].eq(m_coeff.dat_r)
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),
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If(stage[2] & en[1] & dsp.clip,
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clips[channel[2]].eq(1)
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)
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],
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1: [
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