c557348523
core_intrinsics attr need to be in the lib crate
2021-02-03 15:26:13 +01:00
738516eedb
Adding broken example
2021-02-03 15:13:37 +01:00
5945cfca75
Merge pull request #258 from vertigo-designs/feature/input-capture-fixes
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Updating input capture for timers
2021-02-03 14:54:55 +01:00
ef22f5ab92
Fixing pounder input capture source
2021-02-03 14:11:00 +01:00
9e1a6ec4d5
Updating dependencies
2021-02-03 14:06:09 +01:00
913990d531
Merge remote-tracking branch 'origin/rj/bump-hal-smoltcp' into feature/mqtt-convert
2021-02-03 14:02:20 +01:00
4e6f65b3e0
Fixing spacing
2021-02-03 13:42:43 +01:00
672ddfa3c3
pounder: also adapt to new hal
2021-02-03 13:25:00 +01:00
c5fde8563c
deps: bump hal and smoltcp, adapt
2021-02-03 13:16:22 +01:00
b57b666473
Updating input capture for timers
2021-02-03 13:03:17 +01:00
e423eff0e2
lockin-external: add doc
2021-02-02 15:50:31 +01:00
bd71136cdf
hw/config: add TODO on synchronization
2021-02-02 15:46:50 +01:00
145b48074e
timers: remove spurious tim2 reset
2021-02-02 15:42:51 +01:00
ddbfa9d988
timestamping: docs and naming
2021-02-02 14:34:48 +01:00
e1c87c149f
timestamping_timer: also reset counter
2021-02-02 13:25:45 +01:00
854ed29b1a
timestamp: pass overflows to the top and ignore them there
2021-02-02 12:34:20 +01:00
4475a2d040
timestamping: full u32 range
...
The sampling timer and the timestamping timer have the same period.
The sampling interval and the batch size are powers of two.
If the timestamping timer wraps at a power of two larger than the
batch period, it will wrap in sync with the batch period.
Even if it didn't the RPLL would handle that. But it requires that the
timer wraps at the u32/i32 boundary (or be shifted left to wrap there).
2021-02-02 11:36:10 +01:00
2144af5bcd
configuration: update to HITL ips
2021-02-01 19:32:20 +01:00
24a4486847
lockin-internal: rotate samples
2021-02-01 19:31:57 +01:00
9ee60824d4
lockin-internal: align processing with lockin-external
2021-02-01 18:15:51 +01:00
f9b5d29450
lockin: de-nest processing flow
2021-02-01 18:14:09 +01:00
b6e22b576b
iir: add const fn new()
2021-02-01 17:18:10 +01:00
656e3253ab
lockin-internal: document, streamline sequence
2021-02-01 17:09:06 +01:00
65a3f839a0
lockin: remove feed()
2021-02-01 13:42:38 +01:00
2c60103696
dsp: accu: add, iir: rename IIRState to Vec5
2021-02-01 12:23:47 +01:00
46a7d67027
lockin-internal: rename, adapt
2021-01-31 19:26:11 +01:00
6e1444f070
Merge pull request #247 from quartiq/dsp-iir-benches
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Dsp iir benches
2021-01-31 19:24:56 +01:00
8dc811da11
Merge pull request #240 from vertigo-designs/feature/lockin-app-refactor
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Adding internal lock-in integration demo
2021-01-31 19:14:08 +01:00
47089c267c
dsp: align iir and iir_int, add iir micro benches
2021-01-31 19:12:24 +01:00
80055076b8
lockin: scale output
2021-01-31 17:41:20 +01:00
82c8fa1a07
rpll: extend tests
2021-01-31 17:10:03 +01:00
ab20d67a07
rpll: remove redundant time tracking
2021-01-31 13:42:15 +01:00
096f786795
Expanding miniconf to lockin
2021-01-30 18:57:06 +01:00
411a847a88
Updating smoltcp-nal
2021-01-30 18:48:27 +01:00
0d1b237202
complex: richer API
2021-01-30 18:05:54 +01:00
9a1bb5da91
Fixing build
2021-01-30 15:07:26 +01:00
b73286c188
Removing MQTT interface
2021-01-30 15:00:58 +01:00
e954ba3c52
Merge branch 'master' into feature/mqtt-convert
2021-01-30 14:48:54 +01:00
8b46c3c768
Updating internal lockin demo
2021-01-29 18:55:54 +01:00
b152343aaf
Style
2021-01-29 11:05:46 +01:00
ab7d725235
Updating lockin demo after testing
2021-01-29 11:01:21 +01:00
1ebbe0f6d7
Cleaning up demo
2021-01-29 10:11:56 +01:00
cf8b06be81
Merge branch 'master' into feature/lockin-app-refactor
2021-01-29 10:06:45 +01:00
Ryan Summers
c628b8d57a
Update src/bin/lockin-internal-demo.rs
...
Co-authored-by: Robert Jördens <rj@quartiq.de>
2021-01-29 09:55:23 +01:00
c34e330663
lockin: fmt
2021-01-28 23:00:55 +01:00
36288225b3
rpll: extend to above-nyquist frequencies
2021-01-28 22:21:42 +01:00
702ccc231d
Using custom branch of miniconf
2021-01-27 18:15:35 +01:00
1749d48ca3
Revert "rpll: auto-align counter"
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This reverts commit dbacc5293e12f712fef7bd85848e1b0bd8fde823.
2021-01-27 09:01:07 +01:00
45e7d6de3c
rpll: auto-align counter
2021-01-27 09:01:07 +01:00
a772ccc38a
Adding WIP updates for StringSet
2021-01-26 19:14:23 +01:00
7b9fc3b2b3
iir_int: move lowpass coefficient calculation to iirstate
2021-01-26 18:51:20 +01:00
ea7b08fc64
rpll: refine
2021-01-26 14:40:44 +01:00
f0e7c153ba
Adding WIP refactor for MQTT + settings
2021-01-26 14:28:06 +01:00
Ryan Summers
c030b97714
Apply suggestions from code review
...
Co-authored-by: Robert Jördens <rj@quartiq.de>
2021-01-26 12:49:45 +01:00
51085d175e
Removing dead-code allowance
2021-01-26 12:23:17 +01:00
e161f49822
Adding WIP lockin demo
2021-01-26 12:21:44 +01:00
43ff186bc6
Merge branch 'master' into feature/lockin-app-refactor
2021-01-26 10:53:25 +01:00
7c5a74c35e
Renaming internal lockin
2021-01-26 10:52:35 +01:00
9f9744b9e6
rpll: implement
2021-01-25 11:45:59 +01:00
df337f85b8
reciprocal_pll -> rpll
2021-01-25 09:54:56 +01:00
57a5c4ff9b
make lockin a unittest, not integration test
2021-01-22 16:04:02 +01:00
d0d2c6352d
lockin: refactor to use common lockin processing
2021-01-22 16:00:05 +01:00
0cd2140668
rafactor complex, cossin, atan2
2021-01-21 16:12:59 +01:00
948e58c910
lockin: refactor Lockin
2021-01-21 14:57:44 +01:00
5af2b9c63a
fmt
2021-01-20 15:34:56 +01:00
c078de05cc
lockin: fix adc value conversion
2021-01-20 15:31:46 +01:00
d014ed0fe0
add lockin bin
2021-01-20 14:29:29 +01:00
603d6df6a4
Merge branch 'master' into lockin-bin
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* master:
Reordering lib.rs
Removing main.rs
Adding support for multiple applications
Fixing build
Moving panic configuration
Reordering
Refactoring to support multiple apps
2021-01-20 14:19:28 +01:00
507e334ec5
lockin: tweak impl
2021-01-20 14:07:57 +01:00
4d0b1b5566
Reordering lib.rs
2021-01-20 13:44:53 +01:00
86355c9c5d
Removing main.rs
2021-01-20 13:44:16 +01:00
26677063ea
Adding support for multiple applications
2021-01-20 13:43:34 +01:00
2ef27b8187
Formatting
2021-01-20 12:55:55 +01:00
b2cbc6791d
Restructuring
2021-01-20 12:55:45 +01:00
f1f15aca65
Refactoring app structure
2021-01-20 12:49:07 +01:00
a715680482
Merge branch 'master' into feature/lockin-app-refactor
2021-01-20 12:36:20 +01:00
778f4ac4d5
lockin: wrapping_neg
2021-01-19 11:30:12 +01:00
720b143132
Merge remote-tracking branch 'origin/master' into lockin-bin
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* origin/master:
Updating timer compare offsets
Removing dac isr clear
Adding information about DSP timing specifications
Specifying consequences of failing to meet timing
Updating dependencies
Apply suggestions from code review
Adding documentation about double-buffered mode to DACs
Updating DACs to utilize DBM
Adding safety documentation
Adding docs
Updating DAC output format, adding DDS stream docs
Adding documentation for ADCs and DACs
2021-01-19 11:12:50 +01:00
20488ea3bc
lockin: refine
2021-01-19 11:01:21 +01:00
ac06f811ab
Adding framework for initial lockin demo
2021-01-18 18:02:00 +01:00
573189bdd9
Fixing build
2021-01-18 17:23:21 +01:00
9d90d7b0d2
Adding WIP apps
2021-01-18 17:20:33 +01:00
6618e921fe
Moving panic configuration
2021-01-18 16:55:56 +01:00
8dd72ae75e
Reordering
2021-01-18 16:52:09 +01:00
20535a721d
Refactoring to support multiple apps
2021-01-18 16:47:47 +01:00
7a2f950667
Updating timer compare offsets
2021-01-18 13:41:23 +01:00
598a48b178
Merge branch 'master' into feature/io-docs
2021-01-18 13:25:03 +01:00
Matt Huszagh
f0eb58dfb2
swap sin and cos for demodulation
...
The in-phase component should be multiplied by the sin value and the
quadrature component should be multiplied by the cos value.
2021-01-14 14:51:07 -08:00
Matt Huszagh
9d0aa40ce8
Revert "revert changes in main.rs and server.rs"
...
This reverts commit e599977983
2021-01-13 09:54:04 -08:00
Matt Huszagh
e599977983
revert changes in main.rs and server.rs
2021-01-13 08:59:27 -08:00
Matt Huszagh
76088efda5
dsp: add reciprocal_pll
2021-01-13 08:37:33 -08:00
Matt Huszagh
6aad92af43
fix bug in which real signal component is assigned twice
2021-01-12 18:36:18 -08:00
Matt Huszagh
07b7201b49
fix cargo fmt style
2021-01-12 17:26:42 -08:00
Matt Huszagh
a0d472b398
use only integer iir
2021-01-12 17:21:55 -08:00
Matt Huszagh
f974f4099c
remove TODO note relating ADC_BATCHES and calculate_timestamp_timer_period
...
Having both is not really redundant.
2021-01-12 16:17:58 -08:00
Matt Huszagh
80ed715f5a
shift sin/cos before demodulation product to avoid i64
2021-01-12 16:07:04 -08:00
Matt Huszagh
41ea2ebed4
use round up half integer rounding
2021-01-12 15:59:03 -08:00
Matt Huszagh
4c033c0f3e
move timestamp handling into new TimestampHandler struct
2021-01-12 13:06:49 -08:00
Matt Huszagh
e14aa8b613
move lock-in code to main.rs
2021-01-12 10:45:34 -08:00
Matt Huszagh
028f4a1bb2
fix small typos
2021-01-12 07:36:56 -08:00
