rpll: auto-align counter
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@ -18,14 +18,12 @@ impl RPLL {
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///
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/// Args:
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/// * dt2: inverse update() rate. 1 << dt2 is the counter rate to update() rate ratio.
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/// * t: Counter time. Counter value at the first update() call. Typically 0.
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///
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/// Returns:
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/// Initialized RPLL instance.
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pub fn new(dt2: u8, t: i32) -> RPLL {
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pub fn new(dt2: u8) -> RPLL {
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RPLL {
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dt2,
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t,
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..Default::default()
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}
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}
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@ -69,7 +67,19 @@ impl RPLL {
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// Update frequency lock
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self.ff = self.ff.wrapping_add(p_ref.wrapping_sub(p_sig));
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// Time in counter cycles between timestamp and "now"
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let dt = self.t.wrapping_sub(x);
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let mut dt = self.t.wrapping_sub(x);
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if dt < 0 {
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// Timestamp is in the future
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// Advance phase and time until we are just past the most recent
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// timestamp.
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let mut dt_ceil = dt >> self.dt2;
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self.y = self.y.wrapping_sub(self.f.wrapping_mul(dt_ceil));
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dt_ceil <<= self.dt2;
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self.t = self.t.wrapping_sub(dt_ceil);
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dt = dt.wrapping_sub(dt_ceil);
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}
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// Reference phase estimate "now"
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let y_ref = (self.f >> self.dt2).wrapping_mul(dt);
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// Phase error
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@ -53,7 +53,7 @@ const APP: () = {
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// Configure the microcontroller
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let (mut stabilizer, _pounder) = hardware::setup(c.core, c.device);
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let pll = RPLL::new(ADC_SAMPLE_TICKS_LOG2 + SAMPLE_BUFFER_SIZE_LOG2, 0);
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let pll = RPLL::new(ADC_SAMPLE_TICKS_LOG2 + SAMPLE_BUFFER_SIZE_LOG2);
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let lockin = Lockin::new(
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&iir_int::IIRState::lowpass(1e-3, 0.707, 2.), // TODO: expose
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