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Reordering

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This commit is contained in:
Ryan Summers 2021-01-18 16:52:09 +01:00
parent 20535a721d
commit 8dd72ae75e
1 changed files with 8 additions and 7 deletions
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15
src/hardware/adc.rs
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@ -1,10 +1,3 @@
use super::timers;
use hal::dma::{
config::Priority,
dma::{DMAReq, DmaConfig},
traits::TargetAddress,
MemoryToPeripheral, PeripheralToMemory, Transfer,
};
///! Stabilizer ADC management interface
///!
///! # Design
@ -83,6 +76,14 @@ use stm32h7xx_hal as hal;
use crate::SAMPLE_BUFFER_SIZE;
use super::timers;
use hal::dma::{
config::Priority,
dma::{DMAReq, DmaConfig},
traits::TargetAddress,
MemoryToPeripheral, PeripheralToMemory, Transfer,
};
// The following data is written by the timer ADC sample trigger into the SPI CR1 to start the
// transfer. Data in AXI SRAM is not initialized on boot, so the contents are random. This value is
// initialized during setup.