Reordering
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@ -1,10 +1,3 @@
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use super::timers;
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use hal::dma::{
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config::Priority,
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dma::{DMAReq, DmaConfig},
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traits::TargetAddress,
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MemoryToPeripheral, PeripheralToMemory, Transfer,
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};
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///! Stabilizer ADC management interface
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///!
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///! # Design
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@ -83,6 +76,14 @@ use stm32h7xx_hal as hal;
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use crate::SAMPLE_BUFFER_SIZE;
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use super::timers;
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use hal::dma::{
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config::Priority,
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dma::{DMAReq, DmaConfig},
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traits::TargetAddress,
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MemoryToPeripheral, PeripheralToMemory, Transfer,
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};
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// The following data is written by the timer ADC sample trigger into the SPI CR1 to start the
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// transfer. Data in AXI SRAM is not initialized on boot, so the contents are random. This value is
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// initialized during setup.
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