Revert "revert changes in main.rs and server.rs"
This reverts commit e599977983
.
This commit is contained in:
parent
1d0e1f9651
commit
9d0aa40ce8
109
src/main.rs
109
src/main.rs
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@ -60,14 +60,21 @@ use heapless::{consts::*, String};
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// The number of ticks in the ADC sampling timer. The timer runs at 100MHz, so the step size is
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// equal to 10ns per tick.
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// Currently, the sample rate is equal to: Fsample = 100/256 MHz = 390.625 KHz
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const ADC_SAMPLE_TICKS: u16 = 256;
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const ADC_SAMPLE_TICKS_LOG2: u16 = 8;
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const ADC_SAMPLE_TICKS: u16 = 1 << ADC_SAMPLE_TICKS_LOG2;
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// The desired ADC sample processing buffer size.
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const SAMPLE_BUFFER_SIZE: usize = 8;
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const SAMPLE_BUFFER_SIZE_LOG2: usize = 3;
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const SAMPLE_BUFFER_SIZE: usize = 1 << SAMPLE_BUFFER_SIZE_LOG2;
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// The number of cascaded IIR biquads per channel. Select 1 or 2!
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const IIR_CASCADE_LENGTH: usize = 1;
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// Frequency scaling factor for lock-in harmonic demodulation.
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const HARMONIC: u32 = 1;
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// Phase offset applied to the lock-in demodulation signal.
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const PHASE_OFFSET: u32 = 0;
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#[link_section = ".sram3.eth"]
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static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new();
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@ -84,7 +91,12 @@ mod timers;
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use adc::{Adc0Input, Adc1Input};
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use dac::{Dac0Output, Dac1Output};
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use dsp::iir;
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use dsp::{
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iir, iir_int,
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reciprocal_pll::TimestampHandler,
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shift_round,
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trig::{atan2, cossin},
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};
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use pounder::DdsOutput;
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#[cfg(not(feature = "semihosting"))]
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@ -205,6 +217,9 @@ const APP: () = {
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adcs: (Adc0Input, Adc1Input),
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dacs: (Dac0Output, Dac1Output),
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input_stamper: digital_input_stamper::InputStamper,
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timestamp_handler: TimestampHandler,
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iir_lockin: iir_int::IIR,
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iir_state_lockin: [iir_int::IIRState; 2],
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eeprom_i2c: hal::i2c::I2c<hal::stm32::I2C2>,
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@ -927,6 +942,17 @@ const APP: () = {
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#[cfg(not(feature = "pounder_v1_1"))]
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let pounder_stamper = None;
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let timestamp_handler = TimestampHandler::new(
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4,
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3,
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ADC_SAMPLE_TICKS_LOG2 as usize,
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SAMPLE_BUFFER_SIZE_LOG2,
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);
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let iir_lockin = iir_int::IIR {
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ba: [1, 0, 0, 0, 0],
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};
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let iir_state_lockin = [[0; 5]; 2];
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// Start sampling ADCs.
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sampling_timer.start();
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timestamp_timer.start();
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@ -942,6 +968,10 @@ const APP: () = {
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pounder: pounder_devices,
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pounder_stamper,
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timestamp_handler,
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iir_lockin,
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iir_state_lockin,
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eeprom_i2c,
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net_interface: network_interface,
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eth_mac,
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@ -949,7 +979,7 @@ const APP: () = {
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}
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}
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#[task(binds=DMA1_STR4, resources=[pounder_stamper, adcs, dacs, iir_state, iir_ch, dds_output, input_stamper], priority=2)]
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#[task(binds=DMA1_STR4, resources=[pounder_stamper, adcs, dacs, iir_state, iir_ch, dds_output, input_stamper, timestamp_handler, iir_lockin, iir_state_lockin], priority=2)]
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fn process(c: process::Context) {
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if let Some(stamper) = c.resources.pounder_stamper {
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let pounder_timestamps = stamper.acquire_buffer();
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@ -965,23 +995,63 @@ const APP: () = {
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c.resources.dacs.1.acquire_buffer(),
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];
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let _timestamp = c.resources.input_stamper.latest_timestamp();
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let (demodulation_initial_phase, demodulation_frequency) = c
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.resources
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.timestamp_handler
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.update(c.resources.input_stamper.latest_timestamp());
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for channel in 0..adc_samples.len() {
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for sample in 0..adc_samples[0].len() {
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let x = f32::from(adc_samples[channel][sample] as i16);
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let mut y = x;
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for i in 0..c.resources.iir_state[channel].len() {
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y = c.resources.iir_ch[channel][i]
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.update(&mut c.resources.iir_state[channel][i], y);
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let [dac0, dac1] = dac_samples;
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let iir_lockin = c.resources.iir_lockin;
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let iir_state_lockin = c.resources.iir_state_lockin;
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let iir_ch = c.resources.iir_ch;
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let iir_state = c.resources.iir_state;
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dac0.iter_mut().zip(dac1.iter_mut()).enumerate().for_each(
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|(i, (d0, d1))| {
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let sample_phase = (HARMONIC.wrapping_mul(
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(demodulation_frequency.wrapping_mul(i as u32))
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.wrapping_add(demodulation_initial_phase),
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))
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.wrapping_add(PHASE_OFFSET);
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let (cos, sin) = cossin(sample_phase as i32);
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let mut signal = (0_i32, 0_i32);
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// shift cos/sin before multiplying to avoid i64 multiplication
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signal.0 =
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adc_samples[0][i] as i16 as i32 * shift_round(cos, 16);
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signal.1 =
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adc_samples[0][i] as i16 as i32 * shift_round(sin, 16);
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signal.0 =
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iir_lockin.update(&mut iir_state_lockin[0], signal.0);
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signal.1 =
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iir_lockin.update(&mut iir_state_lockin[1], signal.1);
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let mut magnitude = f32::from(shift_round(
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signal.0 * signal.0 + signal.1 * signal.1,
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16,
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) as i16);
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let mut phase = f32::from(shift_round(
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atan2(signal.1, signal.0),
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16,
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) as i16);
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for j in 0..iir_state[0].len() {
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magnitude =
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iir_ch[0][j].update(&mut iir_state[0][j], magnitude);
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phase = iir_ch[1][j].update(&mut iir_state[1][j], phase);
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}
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// Note(unsafe): The filter limits ensure that the value is in range.
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// The truncation introduces 1/2 LSB distortion.
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let y = unsafe { y.to_int_unchecked::<i16>() };
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// Convert to DAC code
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dac_samples[channel][sample] = y as u16 ^ 0x8000;
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}
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}
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unsafe {
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let magnitude = magnitude.to_int_unchecked::<i16>();
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let phase = phase.to_int_unchecked::<i16>();
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*d0 = magnitude as u16 ^ 0x8000;
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*d1 = phase as u16 ^ 0x8000;
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}
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},
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);
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if let Some(dds_output) = c.resources.dds_output {
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let builder = dds_output.builder().update_channels(
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@ -994,7 +1064,6 @@ const APP: () = {
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builder.write_profile();
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}
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let [dac0, dac1] = dac_samples;
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c.resources.dacs.0.release_buffer(dac0);
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c.resources.dacs.1.release_buffer(dac1);
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}
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