f0ac8cb354
pipistrello: add user_led:2 for debugging w/o adapter
2015-06-29 11:30:37 -06:00
d39382eca0
pipistrello: ext_led fifo depth 4
2015-06-28 22:06:33 -06:00
165ef20ffa
pipistrello: drop rtio fifos for invisible leds
...
the main board leds are all under the adapter board
also tweak fifo depths a bit in a feeble attempt to circumvent a ISE hang (par
phase 4)
2015-06-28 21:24:57 -06:00
e2cb0e107f
pipistrello: really do not request xtrig
2015-06-28 21:11:41 -06:00
23eee94458
pipistrello: add notes to nist_qc1 about dds_clock
...
* remove xtrig from the target as it is not usually connected (used for
dds_clock) and ignore PMT2/BTN2 as C:15 is used for dds_clock.
* this also aligns the ttl channel numbers with kc705/nist_qc1 (two pmt
inputs followed by 16 ttl outputs followed by leds)
2015-06-28 20:56:12 -06:00
944bfafefa
soc: support QC2 and AD9914 (untested)
2015-06-28 21:37:27 +02:00
b6310b72db
runtime: fix log formatting
2015-06-28 17:29:52 +02:00
8b5b219a18
runtime: provide fixdfdi
2015-06-27 23:51:48 +02:00
3bd7f11737
update lwip
2015-06-27 22:48:41 +02:00
2d475e146b
runtime/flash_storage: use log not printf
2015-06-27 22:47:36 +02:00
a7bbcdc1ad
targets/pipistrello: mon -> moninj
2015-06-27 21:15:17 +02:00
5b3eac1d96
pipistrello: tweak fifo depths a bit
...
ise being dull again, inferring all but one 64x64 fifo as bram...
minimum bram depth is 256 anyway
2015-06-22 23:25:07 -06:00
cd249b2f66
pipistrello: run at 83+1/3 MHz, cleanup CRG
2015-06-22 19:03:00 -06:00
9f3f9255a2
soc: increase DDS output FIFO sizes
2015-06-21 08:40:10 -06:00
87ea1433d3
dds: all working
2015-06-20 18:42:39 -06:00
5a9bdb2e33
DDS monitoring
2015-06-19 15:30:17 -06:00
03fe71228b
dds: phase computation fixes
2015-06-19 11:01:43 -06:00
3636025e69
pipistrello: smaller L2 cache
2015-06-18 09:49:52 -06:00
Florent Kermarrec
449964cce8
runtime/mailbox: remove flush of L2 cache (L2 cache is now shared between CPUs)
2015-06-18 12:18:45 +02:00
Florent Kermarrec
38a0f63bd2
gateware/soc: use Minicon SDRAM controller and 128KB shared L2 cache
2015-06-18 12:18:03 +02:00
b2af0f6cc3
soc,runtime: support TTL override
2015-06-09 19:51:02 +08:00
37c7ea31c3
gui: TTL override support
2015-06-06 00:03:30 +08:00
a2ae5e4706
runtime: report TTL status over UDP
2015-06-03 18:26:19 +08:00
59b339462c
Merge branch 'master' of github.com:m-labs/artiq
2015-06-02 17:45:16 +08:00
b81151eb42
soc: rtio monitor
2015-06-02 17:41:40 +08:00
Yann Sionneau
ed95038681
flash_storage: remove useless parentheses
2015-05-29 11:11:29 +02:00
Yann Sionneau
575dfade38
flash_storage comm: use OK/ERROR replies instead of specific FLASH_WRITE_REPLY
2015-05-29 11:10:40 +02:00
Yann Sionneau
c32133b815
flash_storage: avoid crash if a record size gets corrupted to be less than 6
2015-05-27 12:56:21 +02:00
Yann Sionneau
4bf7875b87
flash_storage: refactor + unit tests + artiq_coreconfig.py CLI + doc
2015-05-27 18:06:12 +08:00
6c35d066fc
runtime: add missing include
2015-05-21 12:00:48 +08:00
0ca42dbdbe
runtime/dds: send one FUD per command in a batch, compensate POW
2015-05-09 17:26:36 +08:00
ce4b5739ed
runtime: reset all DDSes upon startup
2015-05-09 17:12:38 +08:00
b22b8b661b
runtime: fix rtio channel selection in dds batch
2015-05-08 22:09:08 +08:00
55f2fef576
runtime: support DDS batches
2015-05-08 16:51:54 +08:00
53c6339307
runtime: break ttl-specific functions from rtio
2015-05-08 16:20:12 +08:00
a36c51eb83
DDS over RTIO (batch mode not supported yet)
2015-05-08 14:44:39 +08:00
a91bb48ced
gateware: adapt to misoc changes
2015-05-06 18:02:15 +08:00
4048568d8e
support kernel handover with coherent time
2015-05-02 23:41:49 +08:00
d8fdac6f86
runtime/bridge: factor rtio_init
2015-05-02 12:27:15 +08:00
050db0b0f5
runtime: support platforms without flash
2015-05-02 12:20:20 +08:00
8fe5c7ac01
runtime/test_mode: support setting O and OE separately
2015-05-02 12:16:09 +08:00
a61d701d47
rtio: decouple PHY reset from logic reset
2015-05-02 11:47:11 +08:00
62669f9ff2
soc: factor timer, kernel CPU and mailbox
2015-05-01 18:51:24 +08:00
4d31194343
runtime: load idle kernel from flash storage
2015-05-01 13:49:26 +08:00
d3753c9643
runtime: get IP and MAC from flash storage
2015-05-01 12:34:47 +08:00
56c85dd2cb
style
2015-04-30 20:03:29 +08:00
87ae250baa
runtime: validate pointers received from kernel CPU
2015-04-30 10:52:50 +08:00
967145f2dc
watchdog support on core device (broken by bug similar to issue #19 )
2015-04-29 12:58:37 +08:00
f60868f084
runtime/kloader: clear kernel-CPU mailbox on stop to avoid fake spurious messages
2015-04-29 12:57:09 +08:00
37ac6c4542
runtime: [HACK] workaround for intermittent RPC crashes
2015-04-28 17:15:39 +08:00
1ce41d567c
runtime/mailbox: fix mailbox_acknowledged for first message
2015-04-28 16:51:55 +08:00
53055a045d
test_mode: flash storage access
2015-04-28 13:01:54 +08:00
9fceae7515
runtime/session: simplify buffer management
2015-04-28 13:01:22 +08:00
9b62e7e77b
runtime,coredevice: support session reset for serial
2015-04-28 02:11:58 +08:00
8a19766278
runtime,comm_generic: improve and fix list encoding
2015-04-28 01:31:55 +08:00
86c012924e
targets: rename AMP->Top, merge peripherals
2015-04-28 00:18:54 +08:00
938e1c2842
Remove UP support.
...
The only advantage of UP is to support the Papilio Pro, but that port is also very limited in other ways and the Pipistrello provides a more reasonable platform that also supports AMP.
On the other hand, RPCs on UP are difficult to implement with the session.c protocol system (without an operating system or coroutines), along with many other minor difficulties and maintainance issues. Planned features such as watchdogs in the core device are also difficult on UP.
2015-04-27 20:43:45 +08:00
1ca49787b4
runtime: update lwip
2015-04-27 20:34:34 +08:00
bd7a031466
flash_storage: cleanup and compile
2015-04-27 17:48:31 +08:00
Yann Sionneau
13119eb9ee
flash_storage: add key-value flash storage support
2015-04-27 11:39:19 +08:00
110f7bce64
runtime: saner lwipopts
2015-04-25 18:58:45 +08:00
8f5f428c0b
runtime/main: fix sys_now
2015-04-24 18:30:27 +08:00
934a6b0495
runtime,coredevice: Ethernet support (buggy)
2015-04-23 23:22:40 +08:00
1968304b4f
runtime: upgrade lwip (fixes zero-copy tcp_write)
2015-04-23 19:13:09 +08:00
d99976dc37
runtime/elf_loader: add alignment comment
2015-04-23 19:06:23 +08:00
459da723d3
liblwip/netif/liteethif: follow lwip doc recommendations regarding end of pbuf chain detection
2015-04-23 17:21:42 +08:00
7290013671
liblwip/netif/liteethif: fix buffer pointer arithmetic
2015-04-23 17:18:03 +08:00
6a80944c3f
runtime: increase packet buffer size
2015-04-22 15:01:58 +08:00
e4251c7f41
runtime: get lwip to run
2015-04-22 15:01:32 +08:00
d5d49e73d2
runtime: fix user_kernel_state on UP
2015-04-22 11:41:54 +08:00
18106cc014
comm: refactor to support lwip event model
2015-04-22 01:31:31 +08:00
904bcd247f
runtime: only build liteethif if Ethernet core present
2015-04-18 22:25:27 +08:00
b972abd142
runtime: fix test mode on UP
2015-04-18 15:30:46 +08:00
4c6387929b
runtime: link against lwip, cleanups
2015-04-17 16:38:46 +08:00
91cd79a8a3
soc/runtime: add lwip (thanks Florent)
2015-04-17 14:51:30 +08:00
6a5f58e5a9
runtime: support test mode on AMP
2015-04-16 21:47:05 +08:00
546996f896
coredevice,runtime: put ref_period into the ddb
2015-04-16 15:15:38 +08:00
a5ea40478c
runtime/Makefile: use printf instead of non-portable echo -e
2015-04-15 21:13:20 -06:00
61a6506484
targets/pipistrello: add mailbox memory region
2015-04-15 20:41:28 +08:00
Florent Kermarrec
fd2def4951
generate MAILBOX_BASE with SoC and use it in runtime
...
to avoid possible future mismatches between SoC/runtime, constants that can be easily generated from SoC should be defined this way.
2015-04-15 20:40:28 +08:00
c1f9fc2ae4
runtime: update mailbox address
2015-04-15 14:11:12 +08:00
9cfe00e23e
runtime: keep .bin
2015-04-15 14:05:34 +08:00
ffe4ee9137
runtime: build flash image by default
2015-04-15 12:43:15 +08:00
a336c95d0a
runtime/Makefile: work around echo vs bin/echo
2015-04-14 21:26:49 -06:00
f988ec318e
pipistrello: fix csrs, make AMP default
2015-04-14 21:10:07 -06:00
9e726d7dd1
ppro: ignore all async paths
2015-04-14 18:18:48 -06:00
70916aa0c5
pipistrello: tig _all_ async paths, add timing interference report
2015-04-14 18:18:48 -06:00
066adbdeac
pipistrello: timing report
2015-04-14 18:18:16 -06:00
6217cf5392
pipistrello: basesoc, cleanup
2015-04-14 18:18:16 -06:00
4c10182c9f
rtio: refactor, use rtlink
2015-04-14 19:44:45 +08:00
c0f1708c20
targets/pipstrello: fix mem_map
2015-04-14 19:34:14 +08:00
a50f2c20ff
targets/ppro: fix mem_map update
2015-04-11 21:59:29 +08:00
601f593ac4
targets/kc705: do not depend on particular Migen generated signal names
2015-04-11 21:46:57 +08:00
Florent Kermarrec
bdd02a064e
targets/artiq_kc705: add false path between rsys_clk and rio_clk (reduce P&R on AMP from 40 minutes to 5 minutes :)
2015-04-11 21:32:46 +08:00
Florent Kermarrec
24b2bd7b6f
soc/targets: use mem_map, fix addressing conflict on UP between ethernet and dds
2015-04-11 21:32:11 +08:00
fb75bd246e
targets/kc705: make AMP the default
2015-04-11 17:16:25 +08:00
b492aad1c4
targets/kc705: enable Ethernet core
2015-04-10 13:15:32 +08:00
cb2596bd81
coredevice/comm: split protocol to allow reuse for Ethernet
2015-04-10 00:59:35 +08:00
44304a33b2
soc,runtime: define RTIO FUD channel number in targets
2015-04-09 00:35:11 +08:00
7e591bb1c7
targets: use _Peripherals/UP/AMP class names, share QC1 IO defs
2015-04-07 00:07:53 +08:00
