ad096f294c
phaser: add hitl test exercising the complete API
2020-09-22 15:35:19 +00:00
85d16e3e5f
phaser: tweaks
2020-09-22 15:27:38 +00:00
5c76f5c319
tester: add phaser
2020-09-22 14:36:49 +00:00
fd5e221898
phaser: dac and trf register maps, init code
2020-09-22 14:08:39 +00:00
3e036e365a
phaser: nco, settings and init tweaks
2020-09-22 09:52:49 +00:00
fdb2867757
phaser: fewer iotest patterns
2020-09-21 17:06:26 +02:00
d730851397
phaser: elaborate init sequence, more tests
2020-09-21 15:05:29 +00:00
f0959fb871
phaser: iotest early, check_alarms
2020-09-17 14:13:58 +00:00
b15e388b5f
ad53xx: distinguish errors
2020-09-17 14:13:10 +00:00
868a9a1f0c
phaser: new multidds
2020-09-16 14:06:38 +00:00
c18f515bf9
phaser: rework rtio channels, sync_dly, init()
2020-09-16 12:23:07 +00:00
f3b0398720
phaser: n=2, m=16, sync_dly
2020-09-16 09:19:15 +00:00
9b58b712a6
phaser: doc tweaks
2020-09-15 12:35:26 +00:00
ff57813a9c
phaser: init [wip]
2020-09-15 08:46:47 +00:00
07418258ae
phaser: init [wip]
2020-09-15 08:46:10 +00:00
3a79ef740b
phaser: work around integer size
2020-09-15 08:46:10 +00:00
b449e7202b
phaser: rework docs
2020-09-15 08:46:10 +00:00
b619f657b9
phaser: doc tweaks
2020-09-12 19:59:49 +02:00
c3728678d6
phaser: document, elaborate comments, some fixes
2020-09-12 17:35:14 +00:00
e505dfed5b
phaser: refactor coredevice driver
2020-09-12 14:17:40 +00:00
fdd2d6f2fb
phaser: SI methods
2020-09-12 11:02:37 +00:00
4e24700205
phaser: spelling
2020-09-09 16:52:52 +00:00
8aaeaa604e
phaser: share_lut
2020-09-07 16:06:35 +00:00
e69bb0aeb3
phaser: add comment about get_dac_data
2020-09-07 16:06:16 +00:00
272dc5d36a
phaser: documentation
2020-08-28 16:36:44 +00:00
68bfa04abb
phaser: trf readback strobe spi changes
2020-08-27 15:31:42 +00:00
96fc248d7c
phaser: synchronize multidds to frame
2020-08-27 14:28:19 +00:00
c10ac2c92a
phaser: add trf, duc, interfaces, redo body assembly, use more natrual iq ordering (i lsb)
2020-08-27 14:26:09 +00:00
e5e2392240
phaser: wire up multidds
2020-08-26 17:12:41 +00:00
d1be1212ab
phaser: coredevice shim, dds [wip]
2020-08-26 15:10:50 +00:00
20fcfd95e9
phaser: coredevice shim, readback fix
2020-08-24 15:46:31 +00:00
bcefb06e19
phaser: ddb template, split crc
2020-08-24 14:51:50 +00:00
11c9def589
phaser: readback delay, test fastlink
2020-08-24 14:49:36 +00:00
63e4b95325
fastlink: rework crc injection
2020-08-23 19:41:13 +00:00
a27a03ab3c
fastlink: fix crc vs data width
2020-08-23 19:02:50 +00:00
7e584d0da1
fastino: use fastlink
2020-08-22 11:56:23 +00:00
3e99f1ce5a
phaser: refactor link
2020-08-22 11:56:23 +00:00
a34a647ec4
phaser: refactor fastlink
2020-08-22 11:56:23 +00:00
aa0154d8e2
phaser: initial
2020-08-22 11:56:23 +00:00
5f6aa02b61
gui: unbreak background
2020-08-14 13:14:45 +08:00
David Nadlinger
69718fca90
gui: Improve fuzzy-select heuristics
...
Even though the code already used non-greedy wildcards before,
it would not find the shortest match, as earlier match starts
would still take precedence.
This could possibly be sped up a bit in CPython by doing
everything inside re using lookahead-assertion trickery, but the
current code is already imperceptibly fast for hundreds of
choices.
2020-08-14 02:13:45 +01:00
a46573e97a
Revert "test: set uart log level to INFO for DMA tests"
...
This reverts commit b05cbcbc24
2020-08-13 12:44:33 +08:00
b05cbcbc24
test: set uart log level to INFO for DMA tests
2020-08-13 12:24:57 +08:00
48008eaf5f
test: omit unavailable math functions on OR1K
2020-08-12 15:01:13 +08:00
d8cd5023f6
runtime: expose more libm functions
2020-08-12 13:36:06 +08:00
David Nadlinger
c6f0c4dca4
test/coredevice: Ignore jagged 2D array embedding test for now
2020-08-10 00:23:38 +01:00
David Nadlinger
daf57969b2
compiler: Do not expand strings into TInt(8)s in array()
2020-08-09 23:46:45 +01:00
David Nadlinger
778f2cf905
compiler: Fix numpy.full, implement for >1D
2020-08-09 23:46:45 +01:00
David Nadlinger
53d64d08a8
compiler: Fix multi-dim slice error message test, tweak wording
2020-08-09 23:14:56 +01:00
David Nadlinger
d35f659d25
compiler: Add additional math fns available from Rust libm
2020-08-09 20:09:43 +01:00
