 mwojcik
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70edc9c5c6
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test_write_underflow: decrease underflow delay
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2023-01-11 12:02:51 +08:00 |
 Sebastien Bourdeauducq
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ec893222a4
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rtio: remove support for async mode
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2023-01-06 18:22:05 +08:00 |
|
Spaqin
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17efc28dbe
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DRTIO: RTIO/SYS clock merge
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2022-12-17 15:39:54 +08:00 |
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Sebastien Bourdeauducq
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61d4614b61
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sayma: fix/cleanup DRTIO-DAC sync interaction
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2020-04-06 22:34:05 +08:00 |
|
Sebastien Bourdeauducq
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edf403b837
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drtio: improve error reporting
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2018-09-12 15:44:34 +08:00 |
|
Sebastien Bourdeauducq
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95432a4ac1
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drtio: remove old debugging features
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2018-09-12 13:01:27 +08:00 |
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Sebastien Bourdeauducq
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df61b85988
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drtio: fix imports
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2018-09-09 14:11:32 +08:00 |
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Sebastien Bourdeauducq
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87e0384e97
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drtio: separate aux controller
This helps with managing CSR groups and heterogeneous (satellite/repeaters) DRTIO cores.
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2018-09-05 17:56:58 +08:00 |
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Sebastien Bourdeauducq
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2884d595b3
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drtio: add rt_controller_repeater
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2018-09-05 16:08:40 +08:00 |
|
Sebastien Bourdeauducq
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839f748a1d
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drtio: add external TSC to repeater
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2018-09-05 15:55:20 +08:00 |
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Sebastien Bourdeauducq
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f3fe818049
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rtio: refactor TSC to allow sharing between cores
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2018-09-03 09:48:12 +08:00 |
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Sebastien Bourdeauducq
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078c862618
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drtio: add repeater (WIP, write only)
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2018-09-01 21:07:55 +08:00 |
|
Sebastien Bourdeauducq
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4f963e1e11
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drtio: minor cleanup
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2018-08-30 15:15:32 +08:00 |
|
Sebastien Bourdeauducq
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ce6e390d5f
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drtio: expose internal satellite CRI
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2018-08-30 12:41:09 +08:00 |
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Sebastien Bourdeauducq
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e29536351d
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drtio: resync SYSREF when TSC is loaded
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2018-06-21 17:00:32 +08:00 |
|
Sebastien Bourdeauducq
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9142a5ab8a
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rtio: expose coarse timestamp in RTIO and DRTIO satellite cores
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2018-06-20 17:39:54 +08:00 |
|
Sebastien Bourdeauducq
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2edf65f57b
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drtio: fix satellite minimum_coarse_timestamp clock domain (#947)
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2018-03-13 00:20:57 +08:00 |
|
Sebastien Bourdeauducq
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fa0d929b4d
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drtio: reorganize RX synchronizers
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2018-02-22 15:21:23 +08:00 |
|
Sebastien Bourdeauducq
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ad2c9590d0
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drtio: rewrite/fix reset and link bringup/teardown
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2018-02-20 17:26:43 +08:00 |
|
Sebastien Bourdeauducq
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94c20dfd4d
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drtio: fix misleading GenericRXSynchronizer comment
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2018-02-19 00:47:54 +08:00 |
|
Sebastien Bourdeauducq
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83abdd283a
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drtio: signal stable clock input to transceiver
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2018-02-18 22:29:30 +08:00 |
|
Sebastien Bourdeauducq
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73043c3464
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drtio: disable SED lane spread
Doesn't improve things as the buffer space would still be determined
by the full FIFO, and adds unnecessary logic.
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2017-09-26 16:46:09 +08:00 |
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Sebastien Bourdeauducq
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e430d04d3f
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drtio: remove obsolete import
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2017-09-24 12:49:21 +08:00 |
|
Sebastien Bourdeauducq
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20d79c930c
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drtio: use SED and input collector
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2017-09-24 12:23:47 +08:00 |
|
Sebastien Bourdeauducq
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a201a9abd9
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drtio: multilink transceiver interface
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2017-07-18 13:27:33 +08:00 |
|
Sebastien Bourdeauducq
|
0a687b7902
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drtio: report satellite errors through firmware
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2017-04-01 12:18:00 +08:00 |
|
Sebastien Bourdeauducq
|
1e47e638bb
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drtio: implement inputs in RTPacketSatellite, reorganize code
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2017-03-07 00:46:59 +08:00 |
|
Sebastien Bourdeauducq
|
b8d89d56b1
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drtio: add GenericRXSynchronizer
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2017-01-15 13:44:43 -06:00 |
|
Sebastien Bourdeauducq
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4c3717932e
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drtio: link layer debugging CSRs
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2016-12-07 23:03:14 +08:00 |
|
Sebastien Bourdeauducq
|
7cd27abaa6
|
drtio: do not reset remote TSC on reset command
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2016-11-24 00:09:53 +08:00 |
|
Sebastien Bourdeauducq
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07f2d84275
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drtio: remote resets
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2016-11-23 23:19:31 +08:00 |
|
Sebastien Bourdeauducq
|
9acc7d135e
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gateware: common RTIO interface
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2016-11-22 22:46:50 +08:00 |
|
Sebastien Bourdeauducq
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381e58434f
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drtio: handle link restarts at transceiver level
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2016-11-19 10:46:56 +08:00 |
|
Sebastien Bourdeauducq
|
bb047aabe9
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drtio: simpler link layer
|
2016-11-17 22:32:39 +08:00 |
|
Sebastien Bourdeauducq
|
84bd962ed5
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drtio: integrate aux controller
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2016-11-14 17:20:47 +08:00 |
|
Sebastien Bourdeauducq
|
863934c4fa
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drtio: more reliable link layer init
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2016-11-09 22:03:47 +08:00 |
|
Sebastien Bourdeauducq
|
df7294792c
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drtio: break some RT features into manager, add echo request CSR
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2016-11-04 19:38:24 +08:00 |
|
Sebastien Bourdeauducq
|
bee9774bd5
|
drtio: add link layer status CSR
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2016-11-02 13:09:13 +08:00 |
|
Sebastien Bourdeauducq
|
07ad00c1ca
|
drtio: split kernel/system CSRs
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2016-10-31 18:09:36 +08:00 |
|
Sebastien Bourdeauducq
|
ad042de954
|
drtio: fixes, basic TTL working in simulation
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2016-10-25 12:41:16 +08:00 |
|
Sebastien Bourdeauducq
|
a4e85081aa
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drtio: more simple fixes
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2016-10-24 23:32:49 +08:00 |
|
Sebastien Bourdeauducq
|
029e0d95b7
|
drtio: simple fixes
|
2016-10-24 23:10:15 +08:00 |
|
Sebastien Bourdeauducq
|
7dd6eb2f5e
|
drtio: add RT write controller
|
2016-10-24 19:50:13 +08:00 |
|
Sebastien Bourdeauducq
|
3b4a40401a
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drtio: RTPacketMaster TX (WIP)
|
2016-10-21 22:46:14 +08:00 |
|
Sebastien Bourdeauducq
|
9752ffe3d1
|
drtio: various fixes
|
2016-10-17 19:23:08 +08:00 |
|
Sebastien Bourdeauducq
|
03d3a85e75
|
drtio: RX clock alignment and ready
|
2016-10-15 18:36:27 +08:00 |
|
Sebastien Bourdeauducq
|
c548a65ec3
|
drtio: clock domains
|
2016-10-14 00:34:59 +08:00 |
|
Sebastien Bourdeauducq
|
018f6d1b52
|
drtio: implement basic IOT
|
2016-10-11 17:59:22 +08:00 |
|
Sebastien Bourdeauducq
|
a40b39e9a2
|
drtio: structure
|
2016-10-10 23:12:12 +08:00 |