Commit Graph

8817 Commits

Author SHA1 Message Date
2fba3cfc78 phaser: debug init, systematic bring-up 2020-09-25 20:54:59 +00:00
fec2f8b763 phaser: increase slack for iotest 2020-09-24 10:59:22 +00:00
a65239957f ad53xx: distinguish errors 2020-09-24 10:52:03 +02:00
6e6480ec21 phaser: tweak slacks and errors, identify trf 2020-09-24 08:38:30 +00:00
03d5f985f8 phaser: another artiq-python signed integer quirk 2020-09-23 15:40:54 +00:00
ef65ee18bd dac34h84: unflip spectrum, clear nco 2020-09-23 08:35:56 +00:00
50b4eb4840 Merge branch 'master' into phaser
* master: (26 commits)
  fastino: documentation and eem pass-through
  kasli2: forward sma_clkin to si5324
  test: relax test_dma_playback_time on Zynq
  rpc: fixed _write_bool
  fastino: document/cleanup
  build_soc: remove assertion that was used for test runs
  metlino_sayma_ttl: Fix RTIO frequency & demo code (#1516)
  Revert "test: temporarily disable test_async_throughput"
  build_soc: rename identifier_str to gateware_identifier_str
  test: relax loopback gate timing
  test: temporarily disable test_async_throughput
  test: relax test_pulse_rate on Zynq
  test: skip NonexistentI2CBus if I2C is not supported
  build_soc: override identifier_str only for gateware
  examples: add Metlino master, Sayma satellite with TTLOuts via FMC
  sayma_amc: add support for 4x DIO output channels via FMC
  fmcdio_vhdci_eem: fix pin naming
  build_soc: add identifier_str override option
  RPC: optimization by caching
  test: improved test_performance
  ...
2020-09-22 16:02:25 +00:00
c55f2222dc fastino: documentation and eem pass-through
* Repeat information about matching log2_width a few times
  in the hope that people read it. #1518
* Pass through log2_width in kasli_generic json. close #1481
* Check DAC value range. #1518
2020-09-22 17:58:53 +02:00
ad096f294c phaser: add hitl test exercising the complete API 2020-09-22 15:35:19 +00:00
85d16e3e5f phaser: tweaks 2020-09-22 15:27:38 +00:00
5c76f5c319 tester: add phaser 2020-09-22 14:36:49 +00:00
fd5e221898 phaser: dac and trf register maps, init code 2020-09-22 14:08:39 +00:00
3e036e365a phaser: nco, settings and init tweaks 2020-09-22 09:52:49 +00:00
fdb2867757 phaser: fewer iotest patterns 2020-09-21 17:06:26 +02:00
d730851397 phaser: elaborate init sequence, more tests 2020-09-21 15:05:29 +00:00
f0959fb871 phaser: iotest early, check_alarms 2020-09-17 14:13:58 +00:00
b15e388b5f ad53xx: distinguish errors 2020-09-17 14:13:10 +00:00
29c940f4e3 kasli2: forward sma_clkin to si5324 2020-09-17 16:53:43 +08:00
868a9a1f0c phaser: new multidds 2020-09-16 14:06:38 +00:00
c18f515bf9 phaser: rework rtio channels, sync_dly, init() 2020-09-16 12:23:07 +00:00
f3b0398720 phaser: n=2, m=16, sync_dly 2020-09-16 09:19:15 +00:00
9b58b712a6 phaser: doc tweaks 2020-09-15 12:35:26 +00:00
ff57813a9c phaser: init [wip] 2020-09-15 08:46:47 +00:00
07418258ae phaser: init [wip] 2020-09-15 08:46:10 +00:00
3a79ef740b phaser: work around integer size 2020-09-15 08:46:10 +00:00
b449e7202b phaser: rework docs 2020-09-15 08:46:10 +00:00
b619f657b9 phaser: doc tweaks 2020-09-12 19:59:49 +02:00
c3728678d6 phaser: document, elaborate comments, some fixes 2020-09-12 17:35:14 +00:00
e505dfed5b phaser: refactor coredevice driver 2020-09-12 14:17:40 +00:00
fdd2d6f2fb phaser: SI methods 2020-09-12 11:02:37 +00:00
bff611a888 test: relax test_dma_playback_time on Zynq 2020-09-11 11:21:45 +08:00
4e24700205 phaser: spelling 2020-09-09 16:52:52 +00:00
8aaeaa604e phaser: share_lut 2020-09-07 16:06:35 +00:00
e69bb0aeb3 phaser: add comment about get_dac_data 2020-09-07 16:06:16 +00:00
6195b1d3a0 rpc: fixed _write_bool
Closes #1519
2020-09-04 13:49:22 +08:00
56aa22caeb fastino: document/cleanup
* added documentation on `update`/`hold` mechanism
* mask machine unit values
* cleanup coredevice driver

close #1518
2020-09-03 17:44:26 +02:00
1b475bdac4 build_soc: remove assertion that was used for test runs 2020-09-03 20:24:18 +08:00
458a411320
metlino_sayma_ttl: Fix RTIO frequency & demo code (#1516) 2020-09-03 15:08:31 +08:00
47e88dfcbe Revert "test: temporarily disable test_async_throughput"
This reverts commit f0289d49ab.
2020-09-03 14:19:55 +08:00
002a71dd8d build_soc: rename identifier_str to gateware_identifier_str 2020-09-02 00:00:57 +08:00
4398a2d5fa test: relax loopback gate timing 2020-09-01 17:50:09 +08:00
f0289d49ab test: temporarily disable test_async_throughput
M-Labs/artiq-zynq#104
2020-09-01 17:49:40 +08:00
8d5dc0ad2a test: relax test_pulse_rate on Zynq 2020-09-01 17:08:26 +08:00
f294d039b3 test: skip NonexistentI2CBus if I2C is not supported 2020-09-01 16:47:04 +08:00
91df3d7290 build_soc: override identifier_str only for gateware 2020-09-01 10:46:39 +08:00
3d84135810 examples: add Metlino master, Sayma satellite with TTLOuts via FMC 2020-08-31 16:21:45 +08:00
dfbf3311cb sayma_amc: add support for 4x DIO output channels via FMC 2020-08-31 16:21:45 +08:00
1ad9deaf91 fmcdio_vhdci_eem: fix pin naming 2020-08-31 16:21:45 +08:00
45ae6202c0 build_soc: add identifier_str override option
Signed-off-by: Stephan Maka <stephan@spaceboyz.net>
2020-08-31 11:48:58 +08:00
272dc5d36a phaser: documentation 2020-08-28 16:36:44 +00:00