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113 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 7b72c9e915 remove WRPLL 2022-07-08 17:55:26 +08:00
Peter Drmota 4eee49f889 gateware.test.suservo: Fix tests for python >=3.7 
Closes #1748
 2022-01-11 17:16:09 +08:00
occheung 9eee0e5a7b gateware/suservo: fix profile no. in test 
Follow-up/Test update for 9d49302.
 2022-01-11 14:20:47 +08:00
occheung 09945ecc4d gateware: fix drtio/dma tests 2021-11-08 16:59:08 +08:00
Robert Jördens a9dd0a268c
Merge pull request #1533 from m-labs/phaser 
Phaser
 2020-10-19 09:30:12 +02:00
Robert Jördens 30d1acee9f fastlink: fix fastino style link 2020-10-18 20:43:21 +00:00
Robert Jördens d98357051c add ref data 2020-10-18 20:43:21 +00:00
Robert Jördens 139385a571 fastlink: add fastino test 2020-10-18 17:11:09 +00:00
hartytp a058be2ede wrpll: fix test_helper_collector 2020-10-08 19:43:12 +08:00
Sebastien Bourdeauducq db62cf2abe wrpll: convert tests to self-checking unittests 2020-10-08 18:38:01 +08:00
Robert Jördens bcefb06e19 phaser: ddb template, split crc 2020-08-24 14:51:50 +00:00
Robert Jördens 11c9def589 phaser: readback delay, test fastlink 2020-08-24 14:49:36 +00:00
Sebastien Bourdeauducq e9b81f6e33 remove serwb 
DRTIO is a better solution
 2019-10-06 18:10:23 +08:00
David Nadlinger 720838a23e gateware/suservo: Avoid magic number for activation delay width 
Mostly for documentation purposes; 8 bits ought to be enough for
everyone.
 2019-06-14 23:45:40 +01:00
David Nadlinger a565f77538 Add gateware input event counter 2019-01-15 10:55:07 +00:00
Sebastien Bourdeauducq 1f7858b80b test/dsp: fix rtio_output 2018-11-09 22:11:44 +08:00
Sebastien Bourdeauducq e509ab8553 test/dsp: use absolute import path 
Avoids "ImportError: attempted relative import with no known parent package"
when doing a simple "python -m unittest test_XXX.py".
 2018-11-09 22:10:46 +08:00
Sebastien Bourdeauducq 8caea0e6d3 gateware,runtime: optimize RTIO kernel interface further 
* now pinning (TODO: atomicity)
* for inputs, merge request and timeout registers
 2018-11-08 18:29:24 +08:00
Sebastien Bourdeauducq 53a979e74d rtio: cleanup resets 2018-09-20 10:58:38 +08:00
Sebastien Bourdeauducq b86b6dcc09 drtio: add switching input test 2018-09-19 17:50:29 +08:00
Sebastien Bourdeauducq 3d965910f7 Revert "drtio: implement per-destination underflow margins" 
This reverts commit 142c952e3d.
 2018-09-19 17:05:48 +08:00
Sebastien Bourdeauducq 142c952e3d drtio: implement per-destination underflow margins 2018-09-19 17:03:15 +08:00
Sebastien Bourdeauducq 970d1bf147 drtio: add switching unittest 2018-09-18 15:27:52 +08:00
Sebastien Bourdeauducq 2b44786f73 drtio: add repeater input support 2018-09-17 23:45:27 +08:00
Sebastien Bourdeauducq d38755feff drtio: implement destination state checks on operations 2018-09-15 15:55:45 +08:00
Sebastien Bourdeauducq 95432a4ac1 drtio: remove old debugging features 2018-09-12 13:01:27 +08:00
Sebastien Bourdeauducq 051bafbfd9 drtio: ensure 2 cycles between frames on the link 
This gives time for setting chan_sel before cmd on CRI.
 2018-09-11 22:18:42 +08:00
Sebastien Bourdeauducq 87e0384e97 drtio: separate aux controller 
This helps with managing CSR groups and heterogeneous (satellite/repeaters) DRTIO cores.
 2018-09-05 17:56:58 +08:00
Sebastien Bourdeauducq 839f748a1d drtio: add external TSC to repeater 2018-09-05 15:55:20 +08:00
Sebastien Bourdeauducq 5f20d79408 drtio: add timeout on satellite internal CRI buffer space request 2018-09-05 14:12:11 +08:00
Sebastien Bourdeauducq 778f1de121 drtio: add TSC sync and missed command detection to rt_packet_repeater 2018-09-03 18:26:13 +08:00
Sebastien Bourdeauducq f3fe818049 rtio: refactor TSC to allow sharing between cores 2018-09-03 09:48:12 +08:00
Sebastien Bourdeauducq 0fe2a6801e drtio: forward destination with channel 2018-09-02 15:50:23 +08:00
Sebastien Bourdeauducq 6768dbab6c drtio: add buffer space support to rt_packet_repeater 2018-09-02 14:38:37 +08:00
Sebastien Bourdeauducq 88b7529d09 drtio: share CDC 2018-09-02 14:37:29 +08:00
Sebastien Bourdeauducq 078c862618 drtio: add repeater (WIP, write only) 2018-09-01 21:07:55 +08:00
Sebastien Bourdeauducq 6057cb797c drtio: reorganize tests 2018-08-31 16:28:33 +08:00
Sebastien Bourdeauducq ce6e390d5f drtio: expose internal satellite CRI 2018-08-30 12:41:09 +08:00
Robert Jördens 5b73dd8604 sawg: accurate unittest rtio freq 2018-06-08 17:22:13 +02:00
Florent Kermarrec f77bcbebb5 serwb/test_serwb_core: fix 2018-05-16 08:34:53 +02:00
Florent Kermarrec 77fc5c599f serwb/test: update 2018-05-15 23:52:58 +02:00
Florent Kermarrec 2c627cd061 serwb/scrambler: simplify and set scrambler input data to 0 when sink.stb == 0 2018-05-15 23:49:17 +02:00
Robert Jördens d71e4e60a9 suservo: use addition for offset 2018-05-14 12:26:49 +00:00
Robert Jördens 04240cdc08 suservo: sampler channels are reversed 2018-05-14 12:25:09 +00:00
Sebastien Bourdeauducq 6796413a53 serwb: remove unnecessary shebang line 2018-05-12 22:49:44 +08:00
Sebastien Bourdeauducq 5f0cfadb30 rtio/sed: add unittest for sequence number rollover 2018-05-02 12:04:30 +08:00
Sebastien Bourdeauducq bce8fa3ec5 rtio/sed: add replace unittest at the top level (#978) 2018-05-02 10:58:18 +08:00
Robert Jördens 307cd07b9d suservo: lots of gateware/ runtime changes 
tested/validated:

* servo enable/disable
* dds interface, timing, io_update, mask_nu
* channel control (en_out, en_iir, profile)
* profile configuration (coefficients, delays, offsets, channel)
* adc timings and waveforms measured
* asf state readback
* adc readback

individual changes below:

suservo: correct rtio readback

suservo: example, device_db [wip]

suservo: change rtio channel layout

suservo: mem ports in rio domain

suservo: sck clocked from rio_phy

suservo: cleanup, straighten out timing

suservo: dds cs polarity

suservo: simplify pipeline

suservo: drop unused eem names

suservo: decouple adc SR from IIR

suservo: expand coredevice layer

suservo: start the correct stage

suservo: actually load ctrl

suservo: refactor/tweak adc timing

suservo: implement cpld and dds init
 2018-04-27 13:50:26 +02:00
Robert Jördens b44d6517d1 suservo: use 125 MHz SDR ADC 
* easier timing
* natural sampling on rising edge
* timing, signal robustness
* adjust the servo iteration timing
 2018-04-25 14:32:23 +00:00
Robert Jördens 37c186a0fc suservo: refactor, constrain 
* remove DiffMixin, move pad layout handling to pads
* add input delay constraints, IDELAYs
 2018-04-25 13:44:52 +00:00