mirror of https://github.com/m-labs/artiq.git
drtio: reorganize tests
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parent
4f963e1e11
commit
6057cb797c
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@ -0,0 +1,94 @@
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import unittest
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import random
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from migen import *
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from artiq.gateware.drtio.rt_packet_master import (_CrossDomainRequest,
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_CrossDomainNotification)
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class TestCDC(unittest.TestCase):
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def test_cross_domain_request(self):
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prng = random.Random(1)
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for sys_freq in 3, 6, 11:
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for srv_freq in 3, 6, 11:
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req_stb = Signal()
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req_ack = Signal()
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req_data = Signal(8)
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srv_stb = Signal()
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srv_ack = Signal()
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srv_data = Signal(8)
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test_seq = [93, 92, 19, 39, 91, 30, 12, 91, 38, 42]
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received_seq = []
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def requester():
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for data in test_seq:
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yield req_data.eq(data)
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yield req_stb.eq(1)
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yield
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while not (yield req_ack):
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yield
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yield req_stb.eq(0)
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for j in range(prng.randrange(0, 10)):
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yield
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def server():
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for i in range(len(test_seq)):
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while not (yield srv_stb):
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yield
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received_seq.append((yield srv_data))
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for j in range(prng.randrange(0, 10)):
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yield
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yield srv_ack.eq(1)
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yield
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yield srv_ack.eq(0)
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yield
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dut = _CrossDomainRequest("srv",
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req_stb, req_ack, req_data,
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srv_stb, srv_ack, srv_data)
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run_simulation(dut,
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{"sys": requester(), "srv": server()},
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{"sys": sys_freq, "srv": srv_freq})
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self.assertEqual(test_seq, received_seq)
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def test_cross_domain_notification(self):
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prng = random.Random(1)
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emi_stb = Signal()
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emi_data = Signal(8)
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rec_stb = Signal()
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rec_ack = Signal()
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rec_data = Signal(8)
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test_seq = [23, 12, 8, 3, 28]
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received_seq = []
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def emitter():
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for data in test_seq:
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yield emi_stb.eq(1)
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yield emi_data.eq(data)
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yield
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yield emi_stb.eq(0)
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yield
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for j in range(prng.randrange(0, 3)):
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yield
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def receiver():
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for i in range(len(test_seq)):
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while not (yield rec_stb):
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yield
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received_seq.append((yield rec_data))
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yield rec_ack.eq(1)
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yield
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yield rec_ack.eq(0)
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yield
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for j in range(prng.randrange(0, 3)):
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yield
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dut = _CrossDomainNotification("emi",
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emi_stb, emi_data,
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rec_stb, rec_ack, rec_data)
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run_simulation(dut,
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{"emi": emitter(), "sys": receiver()},
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{"emi": 13, "sys": 3})
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self.assertEqual(test_seq, received_seq)
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@ -1,13 +1,10 @@
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import unittest
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from types import SimpleNamespace
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import random
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from migen import *
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from artiq.gateware.drtio.rt_serializer import *
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from artiq.gateware.drtio.rt_packet_satellite import RTPacketSatellite
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from artiq.gateware.drtio.rt_packet_master import (_CrossDomainRequest,
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_CrossDomainNotification)
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class PacketInterface:
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@ -123,91 +120,3 @@ class TestSatellite(unittest.TestCase):
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yield
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run_simulation(dut, [send(), receive()])
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self.assertEqual(tx_times, rx_times)
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class TestCDC(unittest.TestCase):
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def test_cross_domain_request(self):
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prng = random.Random(1)
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for sys_freq in 3, 6, 11:
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for srv_freq in 3, 6, 11:
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req_stb = Signal()
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req_ack = Signal()
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req_data = Signal(8)
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srv_stb = Signal()
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srv_ack = Signal()
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srv_data = Signal(8)
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test_seq = [93, 92, 19, 39, 91, 30, 12, 91, 38, 42]
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received_seq = []
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def requester():
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for data in test_seq:
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yield req_data.eq(data)
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yield req_stb.eq(1)
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yield
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while not (yield req_ack):
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yield
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yield req_stb.eq(0)
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for j in range(prng.randrange(0, 10)):
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yield
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def server():
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for i in range(len(test_seq)):
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while not (yield srv_stb):
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yield
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received_seq.append((yield srv_data))
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for j in range(prng.randrange(0, 10)):
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yield
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yield srv_ack.eq(1)
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yield
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yield srv_ack.eq(0)
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yield
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dut = _CrossDomainRequest("srv",
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req_stb, req_ack, req_data,
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srv_stb, srv_ack, srv_data)
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run_simulation(dut,
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{"sys": requester(), "srv": server()},
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{"sys": sys_freq, "srv": srv_freq})
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self.assertEqual(test_seq, received_seq)
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def test_cross_domain_notification(self):
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prng = random.Random(1)
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emi_stb = Signal()
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emi_data = Signal(8)
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rec_stb = Signal()
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rec_ack = Signal()
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rec_data = Signal(8)
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test_seq = [23, 12, 8, 3, 28]
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received_seq = []
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def emitter():
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for data in test_seq:
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yield emi_stb.eq(1)
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yield emi_data.eq(data)
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yield
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yield emi_stb.eq(0)
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yield
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for j in range(prng.randrange(0, 3)):
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yield
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def receiver():
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for i in range(len(test_seq)):
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while not (yield rec_stb):
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yield
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received_seq.append((yield rec_data))
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yield rec_ack.eq(1)
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yield
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yield rec_ack.eq(0)
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yield
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for j in range(prng.randrange(0, 3)):
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yield
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dut = _CrossDomainNotification("emi",
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emi_stb, emi_data,
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rec_stb, rec_ack, rec_data)
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run_simulation(dut,
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{"emi": emitter(), "sys": receiver()},
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{"emi": 13, "sys": 3})
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self.assertEqual(test_seq, received_seq)
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