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rtio/sed: add unittest for sequence number rollover

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This commit is contained in:
Sebastien Bourdeauducq 2018-05-02 12:04:30 +08:00
parent 4120105e3a
commit 5f0cfadb30
1 changed files with 19 additions and 5 deletions
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24
artiq/gateware/test/rtio/test_sed_top.py
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@ -10,7 +10,7 @@ from artiq.gateware.rtio.phy import ttl_simple
class DUT(Module):
def __init__(self):
def __init__(self, **kwargs):
self.ttl0 = Signal()
self.ttl1 = Signal()
@ -22,15 +22,15 @@ class DUT(Module):
rtio.Channel.from_phy(self.phy1)
]
self.submodules.sed = SED(rtio_channels, 0, "sync")
self.submodules.sed = SED(rtio_channels, 0, "sync", **kwargs)
self.sync += [
self.sed.coarse_timestamp.eq(self.sed.coarse_timestamp + 1),
self.sed.minimum_coarse_timestamp.eq(self.sed.coarse_timestamp + 16)
]
def simulate(input_events):
dut = DUT()
def simulate(input_events, **kwargs):
dut = DUT(**kwargs)
ttl_changes = []
access_results = []
@ -97,5 +97,19 @@ class TestSED(unittest.TestCase):
input_events += [(now, 1), (now, 0)]
ttl_changes, access_results = simulate(input_events)
self.assertEqual(ttl_changes, list(range(40, 140, 10)))
self.assertEqual(access_results, [("ok", 0)]*len(input_events))
self.assertEqual(ttl_changes, list(range(40, 40+5*20, 10)))
def test_replace_rollover(self):
input_events = []
now = 24
for i in range(40):
now += 10
input_events += [(now, 1)]
now += 10
input_events += [(now, 1), (now, 0)]
ttl_changes, access_results = simulate(input_events,
lane_count=2, fifo_depth=2, enable_spread=False)
self.assertEqual([r[0] for r in access_results], ["ok"]*len(input_events))
self.assertEqual(ttl_changes, list(range(40, 40+40*20, 10)))