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6461f455d6
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Add BEQ instruction
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2020-08-11 16:46:07 +08:00 |
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edadb8da47
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Add RV32I SB-Type Instruction Format
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2020-08-11 16:37:42 +08:00 |
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507675b59f
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Update README.md
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2020-08-11 14:54:27 +08:00 |
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a78309d997
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Add SW instruction
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2020-08-11 14:52:59 +08:00 |
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ec86b3a76a
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Add SH instruction
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2020-08-11 14:51:34 +08:00 |
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c368060315
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Add SB instruction
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2020-08-11 14:50:04 +08:00 |
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0f71c1dad1
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Add RV32I S-Type Instruction Format
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2020-08-11 14:00:04 +08:00 |
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70c417f920
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Update README.md
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2020-08-11 10:08:11 +08:00 |
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c938eefe41
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Update README.md
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2020-08-10 17:37:47 +08:00 |
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31753e3679
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Add ANDI instruction
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2020-08-10 17:35:43 +08:00 |
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c258d541af
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Add ORI instruction
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2020-08-10 17:34:22 +08:00 |
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4b79b06dba
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Add XORI instruction
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2020-08-10 17:32:55 +08:00 |
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71f8a594a6
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Add SLTIU instruction
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2020-08-10 17:29:55 +08:00 |
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84f4b75267
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Add SLTI instruction
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2020-08-10 17:24:50 +08:00 |
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0ae11e12b5
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Add ADDI instruction
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2020-08-10 17:19:57 +08:00 |
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036f842faa
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Add RV32I I-Type Instruction (Arithmetic Variation)
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2020-08-10 17:12:09 +08:00 |
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d60c712704
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Update README.md
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2020-08-10 16:47:09 +08:00 |
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42b8e5c245
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Add LHU instruction
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2020-08-10 16:44:08 +08:00 |
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462e526e71
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Add LBU instruction
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2020-08-10 16:40:45 +08:00 |
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7b440f0fa9
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Add LW instruction
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2020-08-10 16:35:37 +08:00 |
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c88cf830fc
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Add LH instruction
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2020-08-10 16:29:42 +08:00 |
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167d654be8
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Add LB instruction
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2020-08-10 16:26:29 +08:00 |
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bfd8f670c2
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Add RV32I I-Type Instruction (Load Variation)
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2020-08-10 16:16:30 +08:00 |
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10296cbf3b
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Update README
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2020-08-10 14:14:40 +08:00 |
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1cae183569
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Add JALR instruction
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2020-08-10 14:13:25 +08:00 |
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e97a86bfbe
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Add (generic) RV32I I-Type Instruction
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2020-08-10 13:32:04 +08:00 |
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ff977c0e50
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Update README.md
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2020-08-10 12:59:00 +08:00 |
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475c1d9fc2
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Add SRAI instruction
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2020-08-10 12:56:19 +08:00 |
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20a500157b
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Add attribution to SO in InsnSra.py
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2020-08-10 12:46:09 +08:00 |
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9740470c47
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Add SRLI instruction
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2020-08-10 12:35:49 +08:00 |
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031f335325
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Fix SLLI instruction
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2020-08-10 12:31:20 +08:00 |
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1fb51e614d
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Add SLLI instruction
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2020-08-10 12:29:52 +08:00 |
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94faa3ba68
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Remove redundancy in super() calls
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2020-08-10 11:15:05 +08:00 |
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9e64c7ee17
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Add RV32I I-Type Instruction (Shift Variation)
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2020-08-07 16:39:14 +08:00 |
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1c0541cd12
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Document RV32I R-Type Instructions
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2020-08-07 16:06:15 +08:00 |
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9bfd155b44
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Add AND instruction
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2020-08-07 15:57:19 +08:00 |
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07e4c04b26
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Add OR instruction
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2020-08-07 15:54:18 +08:00 |
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d06daac123
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Add SRA instruction
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2020-08-07 15:51:21 +08:00 |
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4f7cf5a370
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Add SRL instruction
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2020-08-07 15:39:46 +08:00 |
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d106ceede7
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Add XOR instruction
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2020-08-07 15:35:40 +08:00 |
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cab30848e9
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Add SLTU instruction
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2020-08-07 15:33:18 +08:00 |
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d33dc1b137
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Add SLT instruction
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2020-08-07 15:29:54 +08:00 |
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44bdff60c8
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Add SLL instruction
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2020-08-07 15:25:05 +08:00 |
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060dd98919
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Add SUB instruction
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2020-08-07 14:00:12 +08:00 |
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ccc1bd098b
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Add ADD instruction
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2020-08-07 13:54:00 +08:00 |
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4f7b11d009
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Add RV32I R-Type Instruction
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2020-08-07 13:45:35 +08:00 |
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2e2300e5c8
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Update insns/README.md
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2020-08-07 12:54:31 +08:00 |
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a8cf15e123
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Add generic instruction class
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2020-08-07 12:28:52 +08:00 |
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56048099b3
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Correct typo in insns/README.md
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2020-08-06 16:44:54 +08:00 |
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9a3cb8e88a
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Fix table formatting in insns/README.md
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2020-08-06 14:45:51 +08:00 |
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