a7720d05cd
firmware, sayma: port converter_spi to spi2
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* ksupport/nrt_bus
* port ad9154, hmc830, hmc7043
* port local_spi and drtio_spi
* port kernel_proto libdrtioaux, satman
* change sayma_rtm gateware over
* add spi2 NRTSPIMaster
* remove spi NRTSPIMaster
* change sayma device_db
* change HMC830 to open mode and explicitly sequence open mode
2018-03-01 11:19:18 +01:00
68278e225d
slave_fpga: check for INIT low
2018-03-01 17:28:01 +08:00
whitequark
14f6fa6699
firmware: fix a warning.
2018-03-01 01:25:55 +00:00
whitequark
d051cec0dd
firmware: remove useless module.
2018-03-01 01:22:52 +00:00
54984f080b
artiq_flash: flash RTM firmware
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based on whitequark's work in f95fb27m-labs/artiq#813
2018-02-28 19:29:01 +01:00
0c49201be7
firmware: add slave fpga serial load support
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based on whitequark's work in f95fb27m-labs/artiq#813
2018-02-28 19:27:52 +01:00
1f999c7f5f
sayma_amc: expose RTM fpga load pins as GPIOs
2018-02-28 18:44:36 +01:00
cedecc3030
Revert "firmware: Sayma RTM FPGA bitstream loading prototype ( #813 )."
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This reverts commit f95fb273f1
2018-02-28 18:43:56 +01:00
whitequark
f95fb273f1
firmware: Sayma RTM FPGA bitstream loading prototype ( #813 ).
2018-02-28 16:46:23 +00:00
Florent Kermarrec
2896dc619b
drtio/transceiver/gth: fix multilane
2018-02-28 14:15:40 +01:00
5046d6a529
ad9912/10: add a bit more slack to init()
2018-02-27 23:14:44 +01:00
f97163cdee
examples/master: sync device_db with kc705_nist_clock
2018-02-27 19:40:00 +01:00
whitequark
916b10ca94
examples: spi → spi2.
2018-02-27 18:36:45 +00:00
whitequark
b81855cce7
conda: don't use globs in file list.
2018-02-27 16:07:01 +00:00
386aa75aaa
kasli: control SFP1 and SFP2 LEDs in DRTIO satellite to match master
2018-02-27 23:18:18 +08:00
5d81877b34
kasli: implement multi-link DRTIO on SFP1 and SFP2 of master
2018-02-27 23:15:20 +08:00
whitequark
2f9d01295c
conda: fix YAML syntax.
2018-02-27 14:03:50 +00:00
whitequark
771ba66055
conda: include all files in output package.
2018-02-27 13:40:02 +00:00
Florent Kermarrec
1f0d955ce4
drtio/transceiver/gtp: implement tx multi lane phase alignment sequence
2018-02-27 12:32:25 +01:00
e565d3fa59
kasli: add analyzer and RTIO log to DRTIO master target
2018-02-27 18:09:07 +08:00
1de2da5644
conda: bump migen/misoc
2018-02-26 14:16:05 +01:00
a35e4fe055
conda: bump jesd204b-0.5
2018-02-26 12:48:48 +01:00
760724c500
kasli/device_db: fix i2c switch addr
2018-02-26 11:37:12 +01:00
b466a569bf
coredevice: export spi2
2018-02-24 09:49:31 +01:00
ddb3d2fe14
DEVELOPER_NOTES: fix devtool autodoc
2018-02-23 15:16:14 +01:00
98489d9739
conda: bump migen/misoc ( #854 )
2018-02-23 21:46:51 +08:00
Florent Kermarrec
5b0f9cc6fd
drtio/transceiver/gth: fix single transceiver case
2018-02-23 12:15:47 +01:00
cff85ee13b
novogorny: simplify and fix coefficient
2018-02-23 10:09:44 +01:00
Florent Kermarrec
b4ba71c7a4
drtio/transceiver/gth: implement tx multi lane phase alignment sequence (fix merge issue...)
2018-02-23 08:37:05 +01:00
Florent Kermarrec
820c834251
drtio/transceiver/gth: implement tx multi lane phase alignment sequence
2018-02-22 22:14:15 +01:00
bc5e949bb4
novogorny: fix gain register length
2018-02-22 18:45:55 +00:00
1452cd7447
novogorny: add coredevice driver and test with Kasli
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m-labs/artiq#687
2018-02-22 17:19:51 +01:00
74517107f0
ad9912: add slack after prodid read
2018-02-22 17:19:51 +01:00
3b7971d15d
kasli: spelling
2018-02-22 17:19:51 +01:00
771bf87b56
kc705: port amc101_dac/spi0 and sma_spi to spi2
2018-02-22 17:19:51 +01:00
whitequark
21b1757bfd
Fix e8d21adf3.
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As usual, conda documentation does not provide a clear explanation
of what the options do...
2018-02-22 13:26:42 +00:00
whitequark
e8d21adf30
conda: turn off binary prefix detection everywhere.
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This just adds garbage to logs and serves no useful purpose.
2018-02-22 12:55:47 +00:00
whitequark
8938b69559
conda: simplify recipes.
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conda-build appears to no longer require the workaround with
environ.get("GIT_*", "") to work.
2018-02-22 12:45:27 +00:00
d4a10dcbd4
urukul: fix example
2018-02-22 11:28:50 +01:00
e8d4db1ccf
coreanalyzer: add spi2 support
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m-labs/artiq#926
2018-02-22 11:28:46 +01:00
f8e6b4f4e3
ad5360: port to spi2
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* kc705 nist_clock target gateware
* coredevice driver
* moninj code
* test/example/device_db
This is untested as we don't have a AD5360 board right now.
Will be tested with Zotino v1.1
m-labs/artiq#926
2018-02-22 10:25:46 +01:00
whitequark
d83ae0bc6a
conda: use the outputs section to dynamically name packages.
2018-02-22 09:25:22 +00:00
c3b8fe06eb
conda/artiq-board: use 'firmware' to encompass runtime and satman
2018-02-22 15:30:26 +08:00
96423882f2
fix 4d6619f3b
2018-02-22 15:27:54 +08:00
whitequark
10c02afd9c
conda: merge all board packages except sayma_rtm into one.
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Fixes #923 .
2018-02-22 07:22:33 +00:00
fa0d929b4d
drtio: reorganize RX synchronizers
2018-02-22 15:21:23 +08:00
e5de5ef473
kasli: use deterministic RX synchronizer
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Could not reproduce the "fully broken bitstream" bug.
2018-02-22 15:18:09 +08:00
4d6619f3bc
satman: send ResetAck
2018-02-22 15:17:44 +08:00
a5ad1dc266
kc705: fix sdcard miso pullup
2018-02-21 19:41:05 +01:00
0d8145084d
test_spi: move to new spi2 core
2018-02-21 19:41:05 +01:00
