srenblad
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity

slave_fpga: check for INIT low

This commit is contained in:
Robert Jördens 2018-03-01 17:28:01 +08:00
parent 14f6fa6699
commit 68278e225d
1 changed files with 5 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
artiq/firmware/libboard_artiq/slave_fpga.rs
View File

@ -42,11 +42,14 @@ pub fn load() -> Result<(), &'static str> {
csr::slave_fpga_cfg::oe_write(CCLK_BIT | DIN_BIT | PROGRAM_B_BIT);
csr::slave_fpga_cfg::out_write(0);
clock::spin_us(1); // TPROGRAM=250ns min
clock::spin_us(1_000); // TPROGRAM=250ns min, be_generous
if csr::slave_fpga_cfg::in_read() & INIT_B_BIT != 0 {
return Err("Slave FPGA did not react to PROGRAM.");
}
csr::slave_fpga_cfg::out_write(PROGRAM_B_BIT);
clock::spin_us(5_000); // TPL=5ms max
if csr::slave_fpga_cfg::in_read() & INIT_B_BIT == 0 {
return Err("Slave FPGA did not initialize.");
return Err("Slave FPGA did finish INITialization.");
}
for i in slice::from_raw_parts(GATEWARE.offset(8), length) {