forked from M-Labs/artiq
sayma_amc: expose RTM fpga load pins as GPIOs
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cedecc3030
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1f999c7f5f
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@ -161,9 +161,17 @@ class Standalone(MiniSoC, AMPSoC):
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]
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# RTM bitstream upload
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rtm_fpga_cfg = platform.request("rtm_fpga_cfg")
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self.submodules.rtm_fpga_cfg = SlaveFPGA(rtm_fpga_cfg)
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self.csr_devices.append("rtm_fpga_cfg")
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slave_fpga_cfg = self.platform.request("rtm_fpga_cfg")
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self.submodules.slave_fpga_cfg = gpio.GPIOTristate([
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slave_fpga_cfg.cclk,
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slave_fpga_cfg.din,
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slave_fpga_cfg.done,
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slave_fpga_cfg.init_b,
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slave_fpga_cfg.program_b,
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])
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self.csr_devices.append("slave_fpga_cfg")
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self.config["HAS_SLAVE_FPGA"] = None
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self.config["SLAVE_FPGA_GATEWARE"] = 0xde0000
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# AMC/RTM serwb
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serwb_pll = serwb.phy.SERWBPLL(125e6, 625e6, vco_div=2)
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