Commit Graph

6251 Commits

Author SHA1 Message Date
f273a9aacc artiq_ddb_template: remove SFP LEDs on hw 2.0+ 2020-07-08 18:15:36 +08:00
2d1f1fff7f kasli_generic: do not attempt to use SFP LED for RTIO on 2.0+ 2020-07-08 18:14:44 +08:00
85b5a04acf test: print transfer rates in MiB/s 2020-07-07 17:28:47 +08:00
13501115f6 test: remove watchdog test (#1458) 2020-07-07 17:28:47 +08:00
f265976df6 i2c: duplicate TCA9548 control byte 2020-07-03 16:45:05 +08:00
David Nadlinger
3f0cf6e683 runtime: Stop kernel CPU before restarting comms CPU on panic
Before, the system would enter a boot loop when a panic occurred
while the kernel CPU was active (and panic_reset == 1), as
kernel::start() for the startup kernel would panic.
2020-07-01 17:29:05 +08:00
95807234d9 compiler: use binutils for ARM
This is mostly due to Windoze, where installing anything is a PITA and the LLVM tools won't be available soon.
2020-06-28 17:33:03 +08:00
89c53c35e8 dashboard: style 2020-06-26 10:12:03 +08:00
David Nadlinger
f36692638c dashboard: Add "Quick Open" dialog for experiments on global shortcut
This is similar to functionality in Sublime Text, VS Code, etc.
2020-06-26 10:11:33 +08:00
David Nadlinger
966ed5d013 master/scheduler: Fix priority/due date precedence order when waiting to prepare
See test case – previously, the highest-priority pending run would
be used to calculate the timeout, rather than the earliest one.

This probably managed to go undetected for that long as any unrelated
changes to the pipeline (e.g. new submissions, or experiments pausing)
would also cause _get_run() to be re-evaluated.
2020-06-19 23:45:52 +01:00
David Nadlinger
7955b63b00 master: Always write results to HDF5 once run stage is reached
Previously, a significant risk of losing experimental results would
be associated with long-running experiments, as any stray exceptions
while run()ing the experiment – for instance, due to infrequent
network glitches or hardware reliability issue – would cause no
HDF5 file to be written. This was especially troublesome as long
experiments would suffer from a higher probability of unanticipated
failures, while at the same time being more costly to re-take in
terms of wall-clock time.

Unanticipated uncaught exceptions like that were enough of an issue
that several Oxford codebases had come up with their own half-baked
mitigation strategies, from swallowing all exceptions in run() by
convention, to always broadcasting all results to uniquely named
datasets such that the partial results could be recovered and written
to HDF5 by manually run recovery experiments.

This commit addresses the problem at its source, changing the worker
behaviour such that an HDF5 file is always written as soon as run()
starts.
2020-06-18 17:47:26 +01:00
David Nadlinger
d87042597a master/worker_impl: Factor out "completed" message sending [nfc]
Just reduces the visual complexity/potential for typos a bit, and
we already have put_exception_report().
2020-06-18 01:30:46 +01:00
charlesbaynham
2429a266f6
ad9912: Fix typing problem on ad9912 (#1466)
Closes #1463

FTW and phase word were ambiguously typed, resulting in failure to compile
2020-06-16 20:17:22 +02:00
Harry Ho
1a17d0c869 zotino: add USER LED test 2020-06-11 16:03:56 +08:00
Harry Ho
6156bd4088 fastino: add tests using DACs and USER LEDs 2020-06-11 14:55:46 +08:00
a18d2468e9 test: do not build libartiq_support in lit.cfg 2020-06-10 17:15:24 +08:00
9822b88d9b
ad9910: fix asf range (#1450)
* ad9910: fix asf range

The ASF is a 14-bit word. The highest possible value is 0x3fff, not
0x3ffe. `int(round(1.0 * 0x3fff)) == 0x3fff`.

I don't remember and understand why this was 0x3ffe since the beginning.
0x3fff was already used as a default in `set_mu()`

Signed-off-by: Robert Jördens <rj@quartiq.de>

* RELEASE_NOTES: ad9910 asf scale change

Co-authored-by: David Nadlinger <code@klickverbot.at>
2020-05-29 11:13:26 +02:00
cb76f9da89 metlino: fix CSR collisions
Closes #1425
2020-05-29 15:59:44 +08:00
bd9eec15c0 metlino: increase number of DRTIO links
Seems OK with Vivado 2019.2.
2020-05-29 15:59:16 +08:00
d5c1eaa16e runtime: remove stack alignment requirement
I suppose this was for TMPU, but was never finished.
2020-05-29 15:37:23 +08:00
02900d79d0 firmware: fix typos 2020-05-29 15:21:07 +08:00
d8b5bcf019 sayma_amc: support uTCA backplane for DRTIO 2020-05-29 14:58:49 +08:00
8b939b7cb3 sayma_amc: remove Master (obsoleted by Metlino) 2020-05-29 14:40:49 +08:00
Charles Baynham
692c466838 Use logger formatting 2020-05-26 17:59:55 +08:00
Charles Baynham
8858ba8095 dashboard: Restart applets if required
Restart applets that are already running if a ccb call updates their spec

Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2020-05-26 17:59:55 +08:00
2538840756
Coredevice Input Validation (#1447)
* Input validation and masking of SI -> mu conversions (close #1446)

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* Update RELEASE_NOTES

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-05-17 15:09:11 +02:00
b3b6cb8efe
ad53xx improvements (#1445)
* ad53xx: voltage_to_mu() validation & documentation (closes #1443, #1444)
The voltage input (float) is checked for validity. If we need more
speed, we may want to check the DAC-code for over/underflow instead.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx documentation: voltage_to_mu is only valid for 16-bit DACs

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* AD53xx: add voltage_to_mu method (closes #1341)

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx: improve voltage_to_mu performance
Interger comparison is faster than floating point math.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* AD53xx: voltage_to_mu method now uses attribute values

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* Fixup RELEASE_NOTES.rst

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx: documentation improvements

voltage_to_mu return value
14-bit DAC support

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2020-05-08 19:23:43 +02:00
4e9a529e5a kasli: integrate WRPLL 2020-05-07 21:34:02 +08:00
60e5f1c18e kasli: DRTIO support for Kasli 2 2020-05-07 20:09:43 +08:00
1f2182d4c7 kasli: default to hardware v2 2020-05-07 19:15:03 +08:00
35f1814235 kasli: implement virtual LEDs 2020-05-07 19:07:43 +08:00
b83afedf43 kasli: light up ERROR LED on panic 2020-05-07 19:06:10 +08:00
4982fde898 firmware: I2C I/O expander support 2020-05-05 21:38:17 +08:00
ef4e5bc69b firmware: Kasli I2C EEPROM cleanup 2020-05-05 21:29:29 +08:00
85e92ae28c compiler: use more LLVM tools on ARM (#733) 2020-04-28 16:21:50 +08:00
7e400a78f4 kasli: compile tester for hw 2.0 by default 2020-04-28 16:07:56 +08:00
140a26ad7e compiler: ld -> ld.lld 2020-04-28 16:07:26 +08:00
4228e0205c compiler: link with lld on ARM (#733) 2020-04-28 15:00:24 +08:00
3a7819704a rtio: support direct 64-bit now CSR in KernelInitiator 2020-04-26 16:04:32 +08:00
251a0101a6 compiler: support disabling now-pinning 2020-04-26 12:38:43 +08:00
d19f28fa84 kasli: v2 clocking WIP, remove SFP LEDs from RTIO 2020-04-23 23:02:18 +08:00
9bc43b2dbf kasli: support EEPROM on v2 2020-04-23 23:00:36 +08:00
77e6fdb7a7 artiq_flash: cleanup Sayma RTM management, support flashing AMC with RTM disconnected 2020-04-14 18:22:06 +08:00
ea79ba4622 ttl_serdes: detect edges on short pulses
Edges on pulses shorter than the RTIO period were missed because the
reference sample and the last sample of the serdes word are the same.

This change enables detection of edges on pulses as short as the
serdes UI (and shorter as long as the pulse still hits a serdes sample
aperture).

In any RTIO period, only the leading event corresponding to the first
edge with slope according to sensitivity is registerd. If the channel is
sensitive to both rising and falling edges and if the pulse is contained
within an RTIO period, or if it is sensitive only to one edge slope and
there are multiple pulses in an RTIO period, only the leading event is
seen. Thus this possibility of lost events is still there. Only the
conditions under which loss occurs are reduced.

In testing with the kasli-ptb6 variant, this also improves resource
usage (a couple hundred LUT) and timing (0.1 ns WNS).
2020-04-13 13:21:03 +02:00
e8b73876ab comm_kernel: add Zynq runtime identifier 2020-04-12 17:25:14 +08:00
de57039e6e comm_kernel: cleanup 2020-04-12 16:02:36 +08:00
9dc24f255e comm_kernel: remove dead code 2020-04-12 15:06:46 +08:00
fb0ade77a9 firmware: fix non-DRTIO build 2020-04-10 17:23:17 +08:00
ec7b2bea12 sayma: round FTW like Urukul in JDCGSyncDDS 2020-04-08 15:00:33 +08:00
0f4be22274 sayma: add simple sychronized DDS for testing 2020-04-08 14:13:54 +08:00
3c823a483a sayma: improve DAC sync messaging (again) 2020-04-06 22:36:43 +08:00
4d601c2102 sayma: improve DAC sync messaging 2020-04-06 22:36:03 +08:00
61d4614b61 sayma: fix/cleanup DRTIO-DAC sync interaction 2020-04-06 22:34:05 +08:00
facc0357d8 drtio: make sure receive buffer is drained after ping reply 2020-04-06 22:33:15 +08:00
ffd3172e02 sayma: move SYSREF DDMTD to RTM (#795) 2020-04-06 00:01:28 +08:00
8f608fa2fa examples/sines_urukul_sayma: adapt for sayma v2, use 1 DAC only 2020-04-05 16:51:40 +08:00
Etienne Wodey
90d08988b2 language/environment: BooleanValue: fix type detection
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-04-04 15:37:04 +08:00
Etienne Wodey
9b03a365ed language/environment: cast argument processor default values early
Fixes #1434. Also add unit tests for some argument processors.

Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-04-04 15:37:04 +08:00
4a8d361ace soc: optimize programmable identifier 2020-03-12 23:09:13 +08:00
9e66dd7075 soc: reprogrammable identifier 2020-03-12 22:23:08 +08:00
380de177e7 rtio: fix wide output after RTIO refactoring
fixes 3d0c3cc1cf
2020-03-05 17:55:27 +00:00
e803830b3b fastino: support wide RTIO interface and channel groups 2020-03-05 17:55:04 +00:00
8451e58fbe ad9912: fix ftw width docstring 2020-02-27 02:11:12 +08:00
Paweł K
2a909839ff
artiq_flash: added option of specifying another username when connecting through SSH. (#1429)
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2020-02-19 19:44:11 +08:00
6d26def3ce sayma: drive filtered_clk_sel on master variant 2020-02-06 22:28:49 +08:00
52ec849008 sayma: fix sysref_delay_dac 2020-02-05 19:04:01 +08:00
c7de1f2e6b metlino: drive clock muxes 2020-02-05 00:06:34 +08:00
bf9f4e380a si5324: program I2C mux on Metlino 2020-02-03 18:07:59 +08:00
ffb24e9fff artiq_flash: use correct proxy bitstream for Metlino 2020-02-03 18:07:26 +08:00
5f8e20b1a1 artiq_sinara_tester: fix device_db filename 2020-01-31 10:26:58 +08:00
dfa033eb87 wrpll: new collector from Weida/Tom 2020-01-24 10:31:52 +08:00
dee16edb78 wrpll: DDMTD sampler double latching 2020-01-22 19:16:26 +08:00
f4d8f77268 turn kasli_tester into a frontend tool 2020-01-21 16:13:04 +08:00
bfcbffcd8d update smoltcp
This disables the 'log' features which does not compile, and may break net_trace. To be investigated later.
2020-01-21 13:58:23 +08:00
82cdb7f933 typo 2020-01-21 10:07:13 +08:00
248230a89e fastino: style 2020-01-20 13:25:00 +01:00
c45a872cba fastino: fix init, set_cfg 2020-01-20 13:25:00 +01:00
2c4e5bfee4 fastino: add [WIP] 2020-01-20 13:25:00 +01:00
8f9948a1ff kasli_sawgmaster: add basemod programming example 2020-01-20 20:14:24 +08:00
e427aaaa66 basemod_att: fix imports 2020-01-20 20:14:24 +08:00
62a52cb086 sayma: do not pollute the log with DAC status on success 2020-01-20 20:14:24 +08:00
6b428ef3be sayma: initialize DAC before testing jesd::ready 2020-01-20 20:14:24 +08:00
7ab0282234 adf5355: style 2020-01-20 13:13:08 +01:00
9368c26d1c mirny: add to manual 2020-01-20 13:13:08 +01:00
Etienne Wodey
da531404e8 artiq_ddb_template: add Mirny support
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-01-20 13:13:08 +01:00
01a6e77d89 mirny: add
* This targets unrelease CPLD gateware (https://github.com/quartiq/mirny/issues/1)
* includes initial coredevice driver, eem shims, and kasli_generic tooling
* addresses the ARTIQ side of #1130
* Register abstraction to be written

Signed-off-by: Robert Jördens <rj@quartiq.de>
2020-01-20 13:13:08 +01:00
ec03767dcf sayma: improve DAC status report 2020-01-20 18:22:06 +08:00
5c299de3b4 sayma: print DAC status on JESD not ready error 2020-01-20 18:21:29 +08:00
45efee724e sayma: add JESD204 PHY done diagnostics 2020-01-20 12:47:31 +08:00
6c3e71a83a wrpll: cleanup 2020-01-18 09:43:43 +08:00
344f8bd12a wrpll: collector patch from Weida 2020-01-18 09:42:58 +08:00
833f428391 sayma: fix hmc542 to/from mu 2020-01-16 09:10:32 +08:00
6c948c7726 sayma: RF switch control is active-low on Basemod, invert 2020-01-16 08:59:52 +08:00
50302d57c0 wrpll: more careful I2C timing 2020-01-14 20:03:46 +08:00
105dd60c78 wrpll: ADPLLProgrammer mini test bench and fixes 2020-01-14 16:52:25 +08:00
3242e9ec6c wrpll: loop test 2020-01-13 22:31:57 +08:00
8ec0f2e717 wrpll: implement ADPLLProgrammer 2020-01-13 22:30:11 +08:00
d5895b8999 wrpll: adpll -> set_adpll 2020-01-13 20:46:36 +08:00
e7ef23d30c wrpll: use CONFIG_CLOCK_FREQUENCY and rtio_frequency in trim_dcxos 2020-01-13 20:44:15 +08:00
ea3bce6fe3 wrpll: wait for settling time after setting ADPLL 2020-01-13 20:43:34 +08:00
d685619bcd wrpll: collector code modifications from Weida 2020-01-13 20:42:41 +08:00
9d7196bdb7 update copyright year 2020-01-13 19:33:44 +08:00
e87d864063 wrpll: print ADPLL offsets 2020-01-13 19:32:30 +08:00
8edbc33d0e wrpll: calculate initial ADPLL offsets 2020-01-13 19:29:10 +08:00
9dd011f4ad firmware: remove bitrotten Sayma code 2020-01-13 18:47:54 +08:00
583a18dd5f firmware: expose fmod to kernels. Closes #1417 2020-01-10 14:33:02 +08:00
David Nadlinger
d8c81d6d05 compiler: Other types microoptimisations
Interestingly enough, these actually seem to give a measurable
speedup (if small – about 1% improvement out of 6s whole-program
compile-time in one particular test case).

The previous implementation of is_mono() had also interesting
behaviour if `name` wasn't given; it would test only for the
presence of any keys specified via keyword arguments,
disregarding their values. Looking at uses across the current
ARTIQ codebase, I could neither find a case where this would
have actually been triggered, nor any rationale for it.

With the short-circuited implementation from this commit,
is_mono() now checks name/all of params against any specified
conditions.
2020-01-01 08:49:19 +00:00
David Nadlinger
2c34f0214b compiler: Short-circuit Type.unify() with identical other type
This considerably improves performance; ~15% in terms of total
artiq_run-to-kernel-compiled duration in one test case.
2020-01-01 08:49:19 +00:00
eebae01503 artiq_client: add back quiet-verbose args for submission
close #1416
regression introduced in 3fd6962
2019-12-31 13:00:26 +01:00
3f32d78c0e wrpll: simple ADPLL test 2019-12-31 12:12:29 +08:00
bb04b082a7 wrpll: clarify comment 2019-12-31 12:12:29 +08:00
David Nadlinger
1e864b7e2d coredevice/suservo: Add separate methods for setting only the IIR offset 2019-12-30 20:02:22 +00:00
a666766f38 wrpll: add ADPLL offset registers 2019-12-30 22:19:42 +08:00
5c6e394928 ddmtd: add collector 2019-12-30 22:17:44 +08:00
642a305c6a wrpll: remove unnecessary delay
Counting now happens in the sys domain with no CDC between counter and CPU.
2019-12-30 20:01:06 +08:00
f57f235dca wrpll: new frequency meter
As per Mattermost discussion with Tom.
2019-12-30 19:47:57 +08:00
9e15ff7e6a wrpll: improve DDMTD deglitcher 2019-12-30 16:56:06 +08:00
dfad27125e runtime: relax/fix TCP keepalive settings (#1125) 2019-12-23 19:58:10 +08:00
b5e1bd3fa2 coredevice: simplify/cleanup network connection code
This removes:
* host-side keepalive, which turns out not to be required
* custom connection timeout (the default is OK)
* SSH tunneling support (doesn't seem to be actually used anywhere)
2019-12-23 19:53:49 +08:00
David Nadlinger
af31c6ea21 coredevice: Don't use is to compare with integer literal
This works on CPython, but is not guaranteed to do so, and
produces a warning since 3.8 (see https://bugs.python.org/issue34850).
2019-12-22 05:46:41 +00:00
fb2076a026 basemod_att: add dB functions, document 2019-12-21 14:56:41 +08:00
b2480f0edc artiq_flash: update actions documentation 2019-12-21 14:18:28 +08:00
d4e039cede basemod: add coredevice driver 2019-12-21 14:18:10 +08:00
106d25b32a kasli_sawgmaster: fix drtio_is_up 2019-12-21 14:17:52 +08:00
8759c8d360 shiftreg: fix get method 2019-12-21 14:17:22 +08:00
c3030f4ffb kasli_sawgmaster: update device_db for BaseMod 2019-12-20 19:59:15 +08:00
cab8c8249e coredevice/shiftreg: add get method 2019-12-20 18:58:50 +08:00
b7f1623197 sayma_rtm: connect attenuator shift registers in series 2019-12-20 18:58:31 +08:00
c5137eeb62 firmware: remove legacy hmc542 code 2019-12-20 15:25:55 +08:00
1c9cbe6285 sayma_rtm: add basemod attenuators on RTIO 2019-12-20 15:25:55 +08:00
David Nadlinger
8f518c6b05 compiler: Allow None in type hints
Similar to how Python itself interprets None as type(None),
make it translate to TNone in ARTIQ compiler type hints.
2019-12-19 09:36:45 +08:00
David Nadlinger
594ff45750 compiler: Revert support for None as TNone
This was mistakenly included in fb2b634c4a, and broke the test
case verifying that using None as an ARTIQ type annotation in fact
generates an error message.
2019-12-18 13:23:40 +00:00
David Nadlinger
fb2b634c4a compiler, language: Implement @kernel_from_string
With support for polymorphism (or type erasure on pointers to
member functions) being absent in the ARTIQ compiler, code
generation is vital to be able to implement abstractions that
work with user-provided lists/trees of objects with uniform
interfaces (e.g. a common base class, or duck typing), but
different concrete types.

@kernel_from_string has been in production use for exactly
this use case in Oxford for the better part of a year now
(various places in ndscan).

GitHub: Fixes #1089.
2019-12-18 10:51:04 +08:00
6ee15fbcae sayma_rtm: basemod RF switches 2019-12-18 10:33:29 +08:00
David Nadlinger
d3508b014f firmware: Add whitespace between panic handler location and message 2019-12-17 19:59:59 +00:00
David Nadlinger
0279a60a55 examples: Add README
This will be displayed by GitHub below the directory listing, and was
inspired by observing new users disregard the examples/ tree entirely
(even though the experiments and device DBs within would have cleared
up their getting-started confusion) due to the perceived complexity
wall induced by the wealth of subdirectories.
2019-12-17 13:35:19 +00:00
8d13aeb96c test: run test_help for browser and dashboard 2019-12-12 10:34:58 +08:00
ac09f3a5da artiq_browser: fix command line argument handling. Closes #1404 2019-12-11 16:18:56 +08:00
52112d54f9 kasli_generic: expose peripheral_processors dictionary. Closes #1403 2019-12-10 10:30:06 +08:00
6f52540569 wrpll: fix previous commit 2019-12-09 20:13:55 +08:00
13486f3acf wrpll: swap helper/main si549 frequencies 2019-12-09 19:49:34 +08:00
150a02117c sayma_rtm: drive clk_src_ext_sel 2019-12-09 19:47:50 +08:00
307a6ca140 gth_ultrascale: make OBUFDS_GTE3 work
https://www.xilinx.com/support/answers/67919.html
2019-12-09 18:13:22 +08:00
4919fb8765 wrpll: print DDMTD helper tags 2019-12-09 17:39:22 +08:00
0d4eccc1a5 wrpll: improve debug output 2019-12-09 17:23:09 +08:00
f633c62e8d wrpll: speed up si549 i2c access 2019-12-09 17:22:58 +08:00
14e09582b6 wrpll: work around si549 not working when lsdiv=2 2019-12-09 16:20:08 +08:00
439576f59d wrpll: fix Si549 initialization delays 2019-12-09 16:13:57 +08:00
2b5213b013 wrpll: constrain clocks 2019-12-09 12:26:44 +08:00
05e2e1899a wrpll: update OBUFDS_GTE2 comment
Seems O can fan out simultaneously to transceiver and fabric.
Kasli is using ODIV2 for no particular reason.
2019-12-09 11:58:54 +08:00
4148efd2ee wrpll: implement filters and connect to Si549 2019-12-09 11:47:29 +08:00
d43fe644f0 wrpll: stabilize DDMTDSamplerGTP 2019-12-09 11:47:14 +08:00
0499f83580 wrpll: helper clock sanity check 2019-12-08 23:46:33 +08:00
46a776d06e sayma: introduce WRPLL on RTM 2019-12-08 15:30:00 +08:00
f35f658bc5 artiq_flash: rework RTM management 2019-12-08 15:29:31 +08:00
bcd061f141 artiq_flash: RTM is a regular DRTIO satellite, can be used with all variants 2019-12-08 15:12:04 +08:00
883310d83e sayma_rtm: si5324 -> cdrclkc 2019-12-08 14:26:05 +08:00
57a5bea43a sayma_rtm: support setting RTIO frequency 2019-12-08 11:45:31 +08:00
da9237de53 wrpll: support differential DDMTD inputs 2019-12-07 18:18:57 +08:00
Paweł Kulik
3851a02a3a Added option of flashing only RTM gateware.
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2019-12-07 09:31:19 +08:00
Paweł Kulik
14e250c78f Enabled internal pullup for CML SYSREF outputs, otherwise there is no signal on them.
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2019-12-07 09:30:24 +08:00
7098854b0f wrpll: share DDMTD counter 2019-12-04 19:05:56 +08:00
05c5fed07d suservo: stray comma 2019-12-03 08:38:07 +00:00
56074cfffa suservo: support operating with one urukul
implemented by wiring up the second Urukul to dummy pins

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-12-02 11:30:20 +01:00
86e1924493 kasli_generic: support external reference on masters 2019-11-30 07:34:41 +00:00
eb271f383b wrpll: add DDMTD cores 2019-11-28 22:03:50 +08:00
39d5ca11f4 si549: increase I2C frequency 2019-11-28 22:03:26 +08:00
87894102e5 si549: use recommended i2c read sequence 2019-11-28 17:49:02 +08:00
2e55e39ac7 wrpll: use spaces to indent 2019-11-28 17:40:25 +08:00
354d82cfe3 wrpll: drive helper clock domain 2019-11-28 17:40:00 +08:00
4a03ca928d artiq_flash: sayma fixes 2019-11-28 17:38:29 +08:00
68cab5be8c si549: cleanups 2019-11-28 16:36:59 +08:00
bcd2383c9d wrpll: si549 initialization 2019-11-27 22:58:08 +08:00
4832bfb08c wrpll: i2c functions, select_recovered_clock placeholder 2019-11-27 21:21:00 +08:00
449d2c4f08 libboard_misoc: fix !has_i2c 2019-11-27 21:04:28 +08:00
e0687b77f5 si5324: 10 MHz ext_ref_frequency
* close #1254
* tested on innsbruck2 kasli variant
* sponsored by Uni Innsbruck/AQT

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-11-22 18:29:12 +01:00
c536f6c4df sayma_amc: output ddmtd_rec_clk 2019-11-20 19:16:04 +08:00
ae50da09c4 drtio/gth_ultrascale: support OBUFDS_GTE3 2019-11-20 19:15:50 +08:00
fe0c324b38 sayma: integrate si549 core 2019-11-20 17:37:16 +08:00
fa41c946ea wrpll: si549 fixes 2019-11-20 17:04:24 +08:00
c5dbab1929 gateware: move wrpll to drtio 2019-11-20 14:43:08 +08:00
gthickman
56d4b70e01 ad9910 osk (#1387)
* updated adoo10.py for RAM mode frequency control

* updated docstrings for set_cfr1() in ad9910.py

* fixed typo in ad9910.py

* added docstrings to ad9910.py

* removed OSK-related changes in AD9910, to be included in a separate branch.

* updated AD9910 set_cfr1 for control of OSK mode parameters

* updated AD9910 set_cfr1() for control of OSK mode parameters.
2019-11-18 15:57:26 +01:00
Fabian Schmid
f73e2a3d30 doc: clarify urukul attenuator behavior
Closes #1386

Signed-off-by: Fabian Schmid <fabian.schmid@mpq.mpg.de>
2019-11-18 15:56:00 +01:00
3adc799785 update GUI background 2019-11-15 13:49:09 +08:00
db13747279 fix device_db alias corner case bugs. Closes #1140 2019-11-14 16:22:45 +08:00
4707aef45c split out artiq-comtools 2019-11-14 15:21:51 +08:00
4416378d21 frontend: add --version to common tools 2019-11-14 11:42:31 +08:00
Garrett
f8a7e278b8 removed OSK-related changes in AD9910, to be included in a separate branch. 2019-11-12 19:07:05 +01:00
Garrett
3a19ba7e62 added docstrings to ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
4ad3651022 fixed typo in ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
6d34eb3bb0 updated docstrings for set_cfr1() in ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
61ca46ec3f updated adoo10.py for RAM mode frequency control 2019-11-12 19:07:05 +01:00
fd7081830c remove fire_and_forget (moved to sipyco) 2019-11-12 19:43:04 +08:00
3fd6962bd2 use sipyco (#585) 2019-11-10 15:55:17 +08:00
6644903843 bootloader: fix imports 2019-11-06 14:45:55 +08:00
5279bc275a urukul: rework EEPROM synchronization. Closes #1372 2019-11-05 18:56:10 +08:00
David Nadlinger
bc3b55b1a8 gateware/eem: Force IOB=TRUE on Urukul SYNC output
Without this, the final register in the SYNC signal TTLClockGen
isn't (always) placed in the I/O tile, leading to more jitter
than necessary, and causing "double window" artefacts. See
sinara-hw/Urukul#16 for more details.

(Patch based on work by Weida Zhang, testing by various members
of the community in Oxford and elsewhere.)
2019-11-05 17:14:07 +08:00
b25a17fa37 netboot: support slave FPGA loading 2019-11-05 16:28:49 +08:00
307f39e900 remoting: fix multiuser access. Closes #1383 2019-11-05 15:46:07 +08:00
9dc82bd766 bootloader: add no_flash_boot config option to force network boot 2019-11-05 15:31:08 +08:00
e2f9f59472 artiq_flash: fix flashing Sayma RTM from package 2019-11-05 15:19:01 +08:00
98854473dd sayma_amc: use all transceivers on master (#1230) 2019-11-02 12:12:32 +08:00
29b4d87943 firmware: add cargosha256.nix 2019-11-01 10:28:41 +08:00
5362f92b39 bootloader: disable minimum stack space check in linker script
* The value varies greatly whether netboot is enabled or not.
* There is no simple solution to detect has_ethmac in the linker script and set the value accordingly.
* The space check is an imperfect solution that will be superseded by stack pointer limits.
* Left commented out so we can re-enable it manually during development if stack corruption is suspected.
2019-11-01 10:25:14 +08:00
deadfead2a bootloader: fix !has_ethmac 2019-11-01 10:19:08 +08:00
42af76326f kasli: enlarge integrated CPU SRAM for DRTIO masters
Required by the bootloader netboot support.
2019-11-01 10:15:13 +08:00
a78e493b72 firmware: load slave FPGA in bootloader 2019-10-31 12:42:40 +08:00
389a8f587a slave_fpga: modularize 2019-10-31 11:50:53 +08:00
9a35a2ed81 test_frontends: update 2019-10-30 22:02:16 +08:00
bc050fdeec bootloader: treat zero-length firmware in flash as no firmware 2019-10-30 21:46:06 +08:00
228e44a059 sayma: enable Ethernet on DRTIO satellite variant
So that netboot can be used in bootloader.
2019-10-30 21:39:00 +08:00
dc71039934 sayma, metlino: increase integrated_sram_size on Ethernet-enabled variants 2019-10-30 21:36:00 +08:00
3042476230 artiq_netboot: remove unnecessary import 2019-10-30 21:29:33 +08:00
c96de7454d remove artiq_devtool 2019-10-30 21:27:24 +08:00
88dbff46f4 add netboot tool 2019-10-30 21:24:51 +08:00
462cf5967e bootloader: add netboot support 2019-10-30 21:23:42 +08:00
1f15e55021 comm_analyzer: don't assume every message has data
close #1377
2019-10-28 15:35:44 +01:00
David Nadlinger
611bcc4db4 compiler: Cache expensive target data layout queries
On one typical experiment, this shaves about 3 seconds (~25%)
off the overall kernel compilation time.

GitHub: Closes #1370.
2019-10-28 11:09:25 +00:00
David Nadlinger
5d7f22ffa4 compiler: Remove provision for unused four-parameter llptr_to_var() form [nfc]
`var_type` was presumably intended to convert to a target type,
but wasn't actually acted on in the function body (nor was it
used anywhere in the codebase).
2019-10-28 11:02:46 +00:00
f2f7170d20 hmc7043: use recommend I/O standards
https://github.com/sinara-hw/Sayma_RTM/issues/116#issuecomment-544187952
2019-10-21 22:56:10 +08:00
47a83c71f1 firmware: more readable network addresses message 2019-10-21 14:00:14 +08:00
818d6b2f5a bootloader: fix compilation problems 2019-10-21 13:28:17 +08:00
8f76a3218e firmware: move i2c to libboard_misoc, enable IPv6 in bootloader, share network settings 2019-10-21 12:58:52 +08:00
1c5e749036 satman: remove compilation warning without JESD DACs 2019-10-21 12:53:54 +08:00
d26d80410e runtime: refactor network settings 2019-10-19 17:56:35 +08:00
6d5dcb4211 runtime: enable IPv6. Closes #349 2019-10-19 17:20:33 +08:00
05e8f24c24 sayma2: JESD204 synchronization 2019-10-18 23:28:47 +08:00
62b49882b9 examples/kc705: fix dds_test 2019-10-17 07:37:00 +08:00
a8f85860c4 coreanalyzer: AD9914 fixes (#1376) 2019-10-17 07:29:33 +08:00
d42ff81144 examples/sayma_master: update device_db 2019-10-16 18:49:25 +08:00
8fa3c6460e sayma_amc: set direction of external TTL buffer according to RTIO PHY OE 2019-10-16 18:48:50 +08:00
37d0a5dc19 rtio/ttl: expose OE 2019-10-16 18:48:20 +08:00
bc060b7f01 style 2019-10-16 18:18:11 +08:00
40d64fc782 sayma: remove standalone examples (no longer supported) 2019-10-16 17:54:39 +08:00
21a1c6de3f sayma: use SFP0 for DRTIO master 2019-10-16 17:53:40 +08:00
6cf06fba7b examples: use default IP addresses for boards 2019-10-16 16:18:30 +08:00
314d9b5d06 kasli: default to 125MHz frequency for DRTIO
This is the consistent and most common option. Sayma will also eventually move to it.
2019-10-08 12:59:52 +08:00
4df2c5d1fb sayma: prepare for SYSREF align
We will try DDMTD on the AMC first, as this is simpler and perhaps will work on v2 after the power supply fixes.
2019-10-08 12:30:47 +08:00
5ee81dc643 satman: define constants for JdacBasicRequest reqnos 2019-10-08 10:27:04 +08:00
4b3baf4825 firmware: run PRBS and STPL JESD204 tests 2019-10-08 00:10:36 +08:00
03007b896e sayma_amc: sma -> mcx 2019-10-07 20:31:35 +08:00
ebd5d890f1 satman: check for JESD ready 2019-10-06 23:10:57 +08:00
90e3b83e80 hmc7043: turn on AMC_FPGA_SYSREF1
Florent's JESD core won't work at all without.
2019-10-06 22:49:00 +08:00
97a0dee3e8 jesd204: remove ibuf_disable
We use the MOSFET to mute the HMC7043 noise on hardware v2 instead.
2019-10-06 22:26:31 +08:00
1bc7743e03 sayma: fix hmc7043 output settings for v2 hardware 2019-10-06 21:50:29 +08:00
a421820a32 sayma: initialize DACs over DRTIO 2019-10-06 21:42:45 +08:00
f8e4cc37d0 sayma_rtm: reset and detect DACs 2019-10-06 20:15:27 +08:00
f62dc7e1d4 sayma: refactor JESD DAC channel groups 2019-10-06 20:15:09 +08:00
c4c884b8ce ad9154: simplify, focus on AD9154 config and do not include JESD 2019-10-06 20:07:02 +08:00
fdba0bfbbc satman: move now-unrelated hmc830_7043 init away from DRTIO transceiver init 2019-10-06 19:22:46 +08:00
1c6c22fde9 sayma_amc: HMC830_REF moved to RTM side 2019-10-06 18:15:37 +08:00
ad63908aff hmc830_7043: enable_fpga_ibuf -> unmute 2019-10-06 18:13:59 +08:00
5ad65b9d30 hmc830_7043: remove clock_mux 2019-10-06 18:13:27 +08:00
e6ff44301b sayma_amc: cleanup (v2.0 only) 2019-10-06 18:11:43 +08:00
e9b81f6e33 remove serwb
DRTIO is a better solution
2019-10-06 18:10:23 +08:00
7cd02d30b7 sayma_rtm_drtio: replace sayma_rtm 2019-10-06 17:59:53 +08:00
b3b85135a3 sayma_rtm_drtio: add DDMTD core, move specific cores out of SatelliteBase 2019-10-06 17:59:11 +08:00
346c985347 sayma_rtm_drtio: use artiq_sayma folder 2019-10-06 17:30:08 +08:00
e2a924449d artiq_flash: use DRTIO RTM gateware 2019-10-06 17:28:14 +08:00
4198033657 sayma_rtm_drtio: cleanup (v2.0 only) 2019-10-06 16:42:34 +08:00
5612b31860 sayma_rtm_drtio: add HMC clock chip and DAC control 2019-10-06 16:15:24 +08:00
a8cf4c2b18 sayma_rtm: hwrev v2.0 by default 2019-10-06 13:25:30 +08:00
1bc5d44a7c artiq_flash: do not flash RTM gateware on Sayma variants that don't need it 2019-10-06 13:15:50 +08:00
bb5ff46f7d Merge branch 'wrpll' 2019-10-05 10:24:11 +08:00
7b95814cf5 sayma_amc: refactor, add SimpleSatellite variant 2019-10-05 10:24:06 +08:00
58b7bdcecc sayma_amc: refactor RTM FPGA code 2019-10-05 10:24:06 +08:00
96fc4a21e8 sayma_amc: remove dummy FPGA pin assignment testing code 2019-10-05 10:24:06 +08:00
Tim Ballance
ada3b39f4e Fix ad9910 ram mode asf scale error in polar mode 2019-10-04 20:14:41 +02:00
Tim Ballance
448080e71d Fix ad9910 ram mode asf scale error
RAM mode amplitude to ASF conversion should be << 18 rather than << 16
2019-10-04 20:14:41 +02:00
6aa68e1715 sayma_rtm2: select filtered clock from Si5324 2019-10-04 22:56:16 +08:00
6cb0f5de59 sayma_amc: enable DRTIO switching 2019-10-04 22:55:23 +08:00
0cf8a46bbd sayma_amc2: select filtered clock from Si5324 2019-10-04 21:28:26 +08:00
6f533727cb artiq_flash: use regular bscan_spi_xcku040 for Sayma
The modified version is no longer necessary on v2 boards, and breaks flash bank 1.
2019-10-04 17:50:45 +08:00
4c1fe1de0d environment: implement HasEnvironment.call_child_method (#1366) 2019-09-30 23:58:36 +08:00
Charles Baynham
0b1fb255a9 tools: Wrap Task _do() calls in a generic exception handler
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2019-09-20 23:00:59 +08:00
Charles Baynham
e50a6d5aaf worker_impy: ignore newline at start of experiment docstring 2019-09-20 22:10:49 +08:00
f0e87d2e59 grabber: remove unused code 2019-09-20 15:26:12 +02:00
4e77be0511 firmware: add Cargo.lock header that newer cargo wants 2019-09-17 15:22:14 +08:00
Charles Baynham
b7abf2fb53 pyon: Handle inf in decoding 2019-09-12 09:46:05 +08:00
38fca01189 artiq_ddb_template: add su-servo support (#1343) 2019-09-11 15:52:25 +08:00
991c686d72 kasli_generic,eem: print RTIO channels in hex like artiq_ddb_template 2019-09-11 15:51:53 +08:00
f4dd7e5e29 kasli_tester: init urukul channel before calibrating
Otherwise the DDS is not initialized and with a cold system it fails to
find IO_UPDATE edges.

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-09-11 07:16:35 +00:00
7492a59f6d kasli_generic: add SUServo support (#1343) 2019-09-11 11:12:48 +08:00
David Nadlinger
6d6f66338b runtime: Update core config panic_reset command suggestion message 2019-09-10 19:31:19 +01:00
Charles Baynham
ddd34e5a9c influx_schedule: log repo_rev along with other info
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2019-09-10 13:46:28 +02:00
98caaebade consistent use of 'class name' terminology to select a class within an experiment file. Closes #1348 2019-09-09 15:16:33 +08:00
21021beb08 kasli: remove opticlock (moved to kasli_generic) 2019-09-09 15:03:10 +08:00
436662be52 ddb_template: add Novogorny support 2019-09-09 15:00:45 +08:00
69c2acd9d7 ddb_template: sampler cnv is ttl not spi 2019-09-09 14:57:42 +08:00
cfb5ef5548 kasli_generic: add Novogorny support 2019-09-09 14:54:34 +08:00
0b9168994f Revert "dashboard: Sort TTL moninj channels by name"
This reverts commit b3db3ea6fc.

Closes #1288
2019-09-06 11:17:10 +08:00
Charles Baynham
d31f30a436 influxdb_schedule: fix typo in parameter name 2019-09-05 17:42:56 +02:00
Charles Baynham
7ac8feea19 influxdb_schedule: Handle all exceptions 2019-09-05 17:42:56 +02:00
1fb317778a eem/grabber: allow third EEM to be specified 2019-08-29 18:58:12 +08:00
90e8e074cd firmware: turn errors into &str for remote_i2c as well
should resolve breakage on a few targets/variants introduced by PR #1351
2019-08-29 09:05:47 +08:00
71b3c66af9 firmware: conditionally compile has_si5324
avoids unused warnings where this module is not used.
2019-08-29 09:04:54 +08:00
959679d8b7 wrpll: add I2CMasterMachine 2019-08-27 18:02:05 +08:00
c03c35f375 Revert "compiler: armv7-unknown-linux-gnueabihf -> armv7-linux-gnueabihf"
rustc insists on -unknown.

This reverts commit cf47fa44d8.
2019-08-26 11:23:00 +08:00
cf47fa44d8 compiler: armv7-unknown-linux-gnueabihf -> armv7-linux-gnueabihf 2019-08-26 11:12:49 +08:00
98cd9a539c compiler: support Cortex A9 target 2019-08-26 10:46:22 +08:00
afe162ceca firmware: don't unwrap() but propagate pca9548 errors 2019-08-17 09:15:26 +08:00
a8aabd3815 firwmare: turn i2c errors into &str 2019-08-17 09:15:26 +08:00
8fc5ce902f firmware: let kasli obtain default hardware_addr from i2c_eeprom 2019-08-17 09:15:26 +08:00
d666f3d573 firmware: factor out mod pca9548 from si5324
orepares for further i2c devices.
2019-08-17 09:15:26 +08:00
1fd2322662 wrpll/thls: implement global writeback 2019-08-15 23:16:17 +08:00
24082b687e wrpll/filters: clean up and make compatible with thls 2019-08-15 17:58:22 +08:00
9331fafab0 wrpll/filters: new code from Weida 2019-08-15 17:24:40 +08:00
5c3974c265 wrpll/thls: fix opcode decoding 2019-08-15 17:12:48 +08:00
19620948bf wrpll/thls: implement signed numbers 2019-08-15 17:04:17 +08:00
efc43142a6 wrpll/thls: implement min/max 2019-08-15 16:42:59 +08:00
44969b03ad wrpll/thls: rework instruction decoding 2019-08-15 15:55:13 +08:00
2776c5b16b wrpll/thls: support mulshift 2019-08-15 15:07:13 +08:00
e9b78b62db kasli_tester/zotino: always alternate voltage sign
Before the voltages on a second Zotino would start 2.1, 1.9, 2.2, 1.8
..., 3.6, 0.4 and overlap with the voltages on the first.
Now the voltages are 2.1, -2.1, 2.2, -2.2, ..., 3.6, -3.6 which allows
quick identification of card/channel and easy prediction when deploying.
2019-08-06 17:38:55 +02:00
f861459ace wrpll: add filter algorithms (WIP) 2019-08-02 13:23:16 +08:00
David Nadlinger
99e490f9ff coredevice/suservo: Slightly reword get_adc[_mu]() docstring for clarity
This hopefully suggests a bit better that the value is the last one
fetched by the servo (i.e. needs the servo active to update), rather
than somehow requesting a new sample to be taken.
2019-07-30 12:22:08 +01:00
3f0657f2a8 artiq_influxdb_schedule: add schedule logger
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-07-26 14:47:18 +02:00
7a5dcbe60e wrpll/thls: support processor start/stop 2019-07-24 18:51:33 +08:00
b8870997d0 doc: clarify TTL direction control with buffered cards 2019-07-24 10:04:45 +08:00
623446f82c wrpll/thls: simple simulation demo 2019-07-20 18:50:57 +08:00
831b3514d3 wrpll/thls: stop at return statement 2019-07-19 16:27:29 +08:00
David Nadlinger
280915d54f coredevice/suservo: Adjust T_CYCLE to match gateware
See GitHub #1338.
2019-07-17 00:20:22 +01:00
34222b3f38 wrpll: encode thls program 2019-07-09 17:56:14 +08:00
5f461d08cd wrpll: add simple thls compiler 2019-07-09 16:07:31 +08:00
f7e10759dc suservo: note requirement to stop servo when accessing state
As already mentioned in the gateware.

One alternative would be to detect address collisions and
stall the read for one cycle.

Note that there will in general not be a consistent view of the servo
state unless the servo is stopped.

close #1337
2019-07-08 18:37:42 +02:00
e4fff390a8 si590 -> si549
Had mistaken the part numbers.
2019-07-07 09:39:55 +08:00
dceb5ae501 wrpll: Si590 I2C mux, CDC 2019-07-05 23:42:37 +08:00
f8dba7ae35 rtio: use BlindTransfer from Migen 2019-07-05 18:46:18 +08:00
5a9bb0ecba runtime: fix incorrect 'RTIO clock failed' report 2019-06-24 23:33:13 +08:00
David Nadlinger
8bf9640185 coredevice/suservo: Fix output IIR state width in docstring 2019-06-21 11:27:39 +02:00
David Nadlinger
34f48f57cc coredevice/suservo: Fix {get,set}_y_mu() scaling
Previously, Channel.set_y(1) would set the output to -1 instead.
2019-06-21 11:27:39 +02:00
f6edceb23d kasli_tester: cleanup/fix test skipping 2019-06-21 16:00:14 +08:00
whitequark
b8b9fa51bd libdyld: accept objects with no rela relocations. 2019-06-17 06:43:34 +00:00
David Nadlinger
0353966ef7 gateware/suservo: Sign-extend data on RTIO read-back
See GitHub #1327 for original patch by Brad Bondurant.
2019-06-14 23:46:16 +01:00
David Nadlinger
720838a23e gateware/suservo: Avoid magic number for activation delay width
Mostly for documentation purposes; 8 bits ought to be enough for
everyone.
2019-06-14 23:45:40 +01:00
53789ba9aa tester: handle urukul switch differences 2019-06-14 10:54:00 +00:00
6655e567df ddb_template: urukul fixes
* fix/add sw (ad9912 and ad9910)
* allow pll_n to be changed
2019-06-14 10:53:03 +00:00
53c778ae2d runtime: fix previous commit 2019-06-14 15:53:01 +08:00
a947867887 runtime: support Kasli Si5324 bypass via rtio_clock=e 2019-06-14 15:48:05 +08:00
66a66b03b4 style 2019-06-14 15:29:16 +08:00
87ce24e867 runtime: refactor startup and RTIO clocking initialization 2019-06-14 15:26:30 +08:00
43e58c939c sayma: drop MasterDAC
This seemed like a good idea then, but it introduces complexity, corner cases, and additional testing difficulties.

Now Sayma works fine with Kasli as a master, which is simpler.
2019-06-14 14:06:16 +08:00
b04e15741b drop SI5324_SAYMA_REF 2019-06-14 14:03:48 +08:00
636b4cae5a tester: urukul single-eem mode 2019-06-13 12:48:42 +00:00
591de0e579 ddb_template: support urukul single-eem mode 2019-06-13 12:19:12 +00:00
967d192cbe ddb_template: wrong copy paste comma 2019-06-13 11:30:22 +00:00
8853cf8df9 dashboard: work around disappearing TTL/DDS panel bug. Closes #1307 2019-06-13 18:41:42 +08:00
1a898c423a aqctl_corelog: filter log messages. Closes #1316 2019-06-13 18:17:52 +08:00
834d03527b examples/dds_setter: fix RTIO underflow 2019-06-13 18:07:39 +08:00
e3c58d5872 remove outdated kc705 examples 2019-06-13 18:06:26 +08:00
74e4b01201 urukul: document consequences of incorrect CPLD clock settings 2019-06-11 11:12:12 +08:00
adf3df2bb5 suservo coredevice driver: mask ftw to avoid erroneous sign extension 2019-06-03 21:40:04 +02:00
bc2cfd77f5 metlino: add EEMs 2019-05-19 18:16:00 +08:00
cdef50c0dd sayma_amc: Urukul v1.3 2019-05-19 16:54:38 +08:00
34c61db790 artiq_flash: fix Metlino support 2019-05-19 16:37:40 +08:00
88b6496c8c artiq_flash: add Metlino support 2019-05-19 16:30:10 +08:00
9dcaae6395 metlino: use variant output directory 2019-05-19 16:24:51 +08:00
b4779969d0 metlino: work around vivado bug (#1230) 2019-05-19 11:27:27 +08:00
874542f33f add Metlino support 2019-05-19 10:57:43 +08:00
hartytp
cfe1f56f73
suservo: add some more comments to the RTServoMem to clarify the RTIO interface (#1323) 2019-05-17 16:12:35 +01:00
David Nadlinger
84b91ee8bd master/scheduler: Document Deleter semantics [nfc]
From looking at the code, it wasn't obvious to me that this is
supposed to handle multiple calls to delete(). This is the case,
however, when for instance Scheduler.delete()ing a run, which
will then also be deleted again from AnalyzeStage.
2019-05-14 22:37:16 +01:00
hartytp
c2b4f0cfe3
sync_struct: catch ConnectionErrors in _receive_cr (#1319) 2019-05-10 12:53:51 +01:00
hartytp
bbcd1db025
sync_struct: replace ConnectionError subclasses with ConnectionError (#1318) 2019-05-10 12:48:12 +01:00
hartytp
30fe624fe5
sync_struct: flake8 [nfc] (#1317) 2019-05-10 12:42:06 +01:00
1a3d71760d consolidate kasli example folders 2019-05-10 12:17:38 +08:00
f551491a84 remove sayma_masterdac example 2019-05-10 12:13:07 +08:00
72f7f8386f remove old Kasli device databases (#1289) 2019-05-10 12:11:42 +08:00
86f462f40e artiq_ddb_template: add edge counter support 2019-05-09 17:20:13 +08:00
fda3cb2482 kasli_generic: add edge counter support 2019-05-09 17:19:11 +08:00
ead9a42842 kasli: remove VLBAIMaster, VLBAISatellite variants 2019-05-08 15:58:25 +00:00
0c9b810501 kasli: remove PTB/PTB2/LUH/HUB variants
see sinara-systems and nix-scripts repos
2019-05-08 15:51:18 +00:00
1d2cc60e0d kasli_generic: support ext_ref 2019-05-08 15:51:18 +00:00
948ea396c0 remove old buildbot kc705 device-db 2019-05-07 17:28:06 +08:00
3209197b0b artiq_flash: do not needlessly look for artifacts 2019-05-07 17:20:13 +08:00
a1c97ec4dd kasli_tester: support selection of TTL output to use as stimulus 2019-05-07 16:58:00 +08:00
4cc9bd33ce test: only test_rpc_timing actually requires ARTIQ_LOW_LATENCY 2019-04-24 11:22:07 +08:00
bb39eedf5b fix previous commit 2019-04-20 10:44:07 +08:00
93f4f31f45 devices.ctlmgr -> master.ctlmgr 2019-04-20 00:25:44 +08:00
56033b60a7 move thorlabs_tcube out of tree (#887) 2019-04-20 00:09:58 +08:00
eaec519ac8 move lda out of tree (#887) 2019-04-19 23:43:14 +08:00
d4781e9a8a aqctl_corelog: add simulation mode 2019-04-19 23:42:37 +08:00
62e9b2d85e move novatech409b out of tree (#887) 2019-04-19 21:56:16 +08:00
4c1fb0c2a1 move korad_ka3005p out of tree (#887) 2019-04-19 19:47:41 +08:00
73d6078883 use IP instead of hostname for kc705-1
Makes it easier to run tests in the Windows VM
2019-04-18 22:59:32 +08:00
David Nadlinger
4d215cf541 firmware: Add Si5324 config for 125 MHz ext ref
PLL divider settings as suggested by DSPLLsim 5.1.
2019-04-15 22:22:19 +01:00
David Nadlinger
dc7a642b26 test/lit: Make abs() integration test slightly more interesting
I had accidentally not included this local diff in the PR that was
merged as commit cdaf554736.

Doesn't include tests for any of the interesting edge cases yet
(nans, infinities, signed zero, int.min), some of which might be
handled differently than by the host Python. In particular, the
select condition should logically use copysign(arg, 1) for the
comparison (i.e., always clear the sign bit), but currently the
chance of anyone running FP-heavy algorithms where this would
matter on the core device is close to zero [1].

[1] Sign of your choice.
2019-04-14 04:12:40 +01:00
David Nadlinger
cdaf554736 compiler: Implement abs() for scalars
GitHub: Fixes #1303.
2019-04-13 13:39:16 +08:00
97b7ed557b sayma_amc: do not use SFP0 (now used for Ethernet) 2019-04-12 18:47:18 +08:00
David Nadlinger
cd7a5a3683 firmware: Fix kernel RPC handling of zero-size values (e.g. empty arrays) 2019-03-31 18:33:44 +01:00
David Nadlinger
b4ddf4c86b firmware: Make "unexpected reply from kernel CPU" log messages unique
This makes it easier to localize issues based on the log output.
2019-03-31 18:31:56 +01:00
David Nadlinger
236b30ac5f coredevice: Add test for recent kernel RPC fixes
This covers all three (de)serialisation fixes.
2019-03-31 18:25:56 +01:00
David Nadlinger
88fd5c8440 compiler: Fix crash in escape analysis for assigning string literals 2019-03-31 17:10:27 +01:00
David Nadlinger
990e0b7dd9 compiler: Fix comparison of tuples of lists 2019-03-31 17:10:27 +01:00
David Nadlinger
baf102dbb2 compiler: Fix comparison of nested lists 2019-03-31 17:10:27 +01:00
David Nadlinger
8e225433a5 firmware: Fix kernel RPC strings size (memory corruption)
Test case to follow.
2019-03-31 17:10:27 +01:00
David Nadlinger
b8ff627be9 firmware: Fix kernel RPC tuple size calculation (memory corruption)
Test case to follow.
2019-03-31 17:10:27 +01:00
David Nadlinger
fc95183e04 coredevice: Fix host-side serialization of (nested) lists
Test case to follow.
2019-03-31 17:10:27 +01:00
David Nadlinger
f9af058b96 compiler: Quote tuples as TTuple values
Previously, they would end up being TInstances,
rendering them useless.
2019-03-31 23:40:21 +08:00
3634cfac86 typo 2019-03-31 22:27:07 +08:00
4580f3dac8 test/lit: support overriding libartiq_support.so 2019-03-31 22:26:09 +08:00
4499ef1748 kasli: only add moninj core if there are probes to monitor 2019-03-24 14:09:52 +08:00
5d31cf2268 sayma_rtm2: si5324_clkout -> cdr_clk_clean 2019-03-23 13:48:36 +08:00
560849e693 sayma_amc: add DRTIO transceiver on rtm_amc_link for v2 hardware 2019-03-23 13:41:22 +08:00
bbb8c00518 sayma_amc: default to satellite variant 2019-03-23 13:37:55 +08:00
18fbe0b081 sayma_rtm_drtio: support v2 hardware 2019-03-23 13:31:28 +08:00
c7205ad82f sayma_rtm: preliminary v2 support 2019-03-23 12:37:03 +08:00
d07c6fcfea ad9910: handle unprogrammed EEPROM and numpy corner cases 2019-03-22 14:28:47 +08:00
7cdcaf0d00 tests: fix coredevice tests after implementing scheduler defaults 2019-03-22 07:27:55 +08:00
33b28f6e56 sayma_amc: add placeholder code to use DDMTD signals on v2 hardware 2019-03-21 17:37:22 +08:00
2ec5a58c59 sayma_amc: si5324_clkout -> cdr_clk_clean 2019-03-21 14:09:33 +08:00
af785b9a9c artiq_compile: fix after adding scheduler defaults
Closes #1290
2019-03-21 09:56:19 +08:00
8d2c1be44f artiq_flash: ignore rtm_gateware on Sayma for variant autodetection 2019-03-17 15:57:50 +08:00
c2622297bd urukul: use board_data instead of user_data to store calibration in EEPROM 2019-03-15 17:57:35 +08:00
a01425bc9c kasli_tester: do not attempt to synchronize AD9912 Urukul 2019-03-15 17:13:29 +08:00
fcf8828cb6 fix tests, artiq_run after implementing scheduler defaults (#1290) 2019-03-13 17:20:30 +01:00
5e7c83c9cf artiq_ddb_template: enable Urukul synchronization from EEPROM 2019-03-13 15:42:51 +08:00
e504262b67 kasli_tester: calibrate Urukul synchronization and write to EEPROM 2019-03-13 15:36:05 +08:00
346299e7f8 kasli_tester: enable EEPROM for Urukul synchronization 2019-03-13 15:35:23 +08:00
04e0c23e78 ad9910: support reading synchronization values from EEPROM 2019-03-13 15:34:47 +08:00
852048dce4 artiq_ddb_template: create Urukul EEPROM device 2019-03-13 15:34:23 +08:00
964a349a19 add Kasli I2C driver 2019-03-13 15:33:50 +08:00
c56c3e5588 dashboard: add support for experiment pipeline/priority/flush defaults 2019-03-12 10:54:15 +01:00
8659c769cb master/language: add methods to set experiment pipeline/priority/flush defaults 2019-03-12 10:54:15 +01:00
b2177eff81 kasli_tester: run test_i2c_switch 2019-03-11 21:06:28 +08:00
227c729f56 fix permissions 2019-03-11 20:43:28 +08:00
David Nadlinger
b3db3ea6fc dashboard: Sort TTL moninj channels by name
With growing system complexity, the moninj channel index is
no longer a very intuitive ordering for typical end users.
2019-03-11 03:30:14 +01:00
David Nadlinger
5fd92a6175 gui: Fix crash when quickly opening/closing applets
Quickly closing/reopening applets (e.g. quickly clicking the checkbox
on an entire folder of applets) would previously lead to an occasional
KeyError on the self.dock_to_item access in on_dock_closed, as close()
would be invoked more than once.

The geometry/checked state handling can potentially be cleaned up
further, but at least this avoid the crash.
2019-03-10 20:57:10 +00:00
e47ba4b35e kasli_generic: fix identifier string 2019-03-08 19:57:20 +08:00
b219f8b5c7 artiq_flash: autodetect variant 2019-03-08 19:47:24 +08:00
fc9d4c7bdc artiq_flash: fix sayma master detection 2019-03-08 19:36:35 +08:00
25bcebd1f6 artiq_flash: not all boards are development boards 2019-03-08 19:35:20 +08:00
ed2d8dfa7a artiq_flash: resolve openocd symbolic links
On NixOS, openocd may be a symlink in /run/current-system/sw/bin when installed system-wide.
2019-03-08 12:43:06 +08:00
0d05d4b813 artiq_client: python 3.7 compatibility 2019-02-26 17:09:38 +08:00
ec966de007 thorlabs_tcube: cleanup 2019-02-26 16:50:19 +08:00
62c7f75a9e sayma_amc: support hardware revisions 2019-02-25 23:49:45 +08:00
d45249197c siphaser: improve ultrascale clock routing 2019-02-25 23:00:01 +08:00
de3992bbdd kasli: remove HUST variants (supported by kasli_generic) 2019-02-23 15:44:17 +08:00
791f830ef6 kasli_generic: support DRTIO 2019-02-23 15:41:05 +08:00
d39338d59f artiq_ddb_template: fix --satellite 2019-02-23 15:27:18 +08:00
d79a6ee41c artiq_ddb_template: fix pll_vco indentation 2019-02-22 23:50:30 +08:00
62985fbd29 binaries -> board-support 2019-02-22 23:18:01 +08:00
1c35c051a5 kasli: remove variants supported by generic builder 2019-02-22 23:08:49 +08:00
05b128469f artiq_ddb_template: support setting Urukul pll_vco 2019-02-22 22:59:20 +08:00
cd60803f21 device_ddb_template: add Sampler, Zotino, Grabber and SFP LED support 2019-02-22 20:07:15 +08:00
269f0a4d6f artiq_ddb_template: add Urukul support 2019-02-22 19:33:27 +08:00
8049c52d06 frontend: add artiq_ddb_template (WIP, TTL only) 2019-02-22 17:19:48 +08:00
8edc2318ab style 2019-02-22 17:19:20 +08:00
aee8965897 ad9910: add ram conversion tooling and unittests
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-02-21 15:59:52 +00:00
ec6588174b ad9910: add ram operation unittests
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-02-21 15:14:32 +00:00
b57cad77ad ad9910: make ram read work for short segments
also cleanup and style

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-02-21 14:47:58 +00:00
596d3e20d7 dashboard,browser: do not call get_user_config_dir() in argparse
This caused two problems when building the docs:
* the path printed in the docs depends on the machine where they are built
* it pollutes ~/.config, and also breaks Nix builds
2019-02-19 15:43:04 +08:00
40a0cf806d support overriding versioneer 2019-02-17 14:49:52 +08:00
6ad2e13515 kasli: add generic builder (WIP) 2019-02-12 19:18:09 +08:00
2104a93f78 build_soc: allow overriding SoC class name 2019-02-12 18:33:52 +08:00
ff4e4f15ed kasli: expose base SoC classes 2019-02-12 18:33:27 +08:00
whitequark
0a84dd38c1 Add missing test from d6eb2b02. 2019-02-10 07:25:53 +00:00
David Nadlinger
01c3000ef3 master: Print offending key on HDF5 dataset type error
This helps debugging the cause of TypeErrors arising from types
not handled by the HDF5 serializer, as the backtrace doesn't
otherwise include any useful information.
2019-02-09 20:50:38 +00:00
David Nadlinger
56b2e0c262 artiq_influxdb: Support append() in dataset _Mock
This went undetected as append mods were not actually in use
in any part of the codebase previously.
2019-02-09 20:50:38 +00:00
David Nadlinger
bf84226c7d language: Support appending to datasets 2019-02-09 20:50:38 +00:00
David Nadlinger
820326960e test: Add basic experiment dataset interface tests 2019-02-09 20:50:38 +00:00
2de1eaa521 dashboard: reconnect to core moninj
* handle disconnects like core device address changes and do a
  disconnect/connect iteration
* after connection failure wait 10 seconds and try again
* this addresses the slight regression from release-2
  to release-3 where the moninj protocol was made stateful
  (#838 and #1125)
* it would be much better to fix smoltcp/runtime to no loose the
  connection under pressure (#1125)
* the crashes reported in #838 look more like a race condition
* master disconnects still require dashboard restarts

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-02-08 23:52:16 +08:00
1cfd26dc2e kasli: add UNSW variant 2019-02-08 17:51:51 +08:00
3e8fe3f29d suservo: fix permissions 2019-02-08 14:54:02 +08:00
David Nadlinger
ef934ad958 Add test/release notes for command-less controllers
See eaa1b44b00 for the actual change.
2019-02-07 21:51:15 +00:00
eaa1b44b00 ctlmgr: ignore controllers without a "command" field
Allow controllers to be specified without a "command" field. The user takes
responsibility for ensuring the controller is running: the controller manager
does not attempt to ping the controller. This is useful when one has a common
controller shared between several masters.
2019-02-07 21:50:29 +00:00
hartytp
0ebff04ad7 SUServo: apply bit masks to servo memory writes to prevent overflows
Signed-off-by: TPH <thomas.harty@physics.ox.ac.uk>
2019-02-07 17:04:11 +01:00
hartytp
f6142816b8
Revert "SUServo: remove references to non-existent a0 parameter" (#1270)
This reverts commit f3aab2b891.

Signed-off-by: TPH <thomas.harty@physics.ox.ac.uk>
2019-02-07 15:57:43 +00:00
hartytp
fe63c9b366
SUServo: remove references to non-existent a0 parameter (#1268)
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
2019-02-07 15:29:32 +00:00
hartytp
df6c1fca2c
SUServo: flake8 [NFC] (#1267)
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
2019-02-07 15:13:44 +00:00
hartytp
87e85bcc14 suservo: fix coefficient data writing
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
2019-02-07 14:47:11 +01:00
whitequark
d6eb2b023a compiler: monomorphize casts first, but more carefully.
This reverts 425cd7851, which broke the use of casts to define
integer width.

Instead of it, two steps are taken:
  * First, literals are monomorphized, leading to predictable result.
  * Second, casts are monomorphized, in a top-bottom way. I.e.
    consider the expression `int64(round(x))`. If round() was visited
    first, the intermediate precision would be 32-bit, which is
    clearly undesirable. Therefore, contextual rules should take
    priority over non-contextual ones.

Fixes #1252.
2019-02-07 06:24:32 +00:00
b56c7cec1e kasli: use 100MHz RTIO and 800MHz Urukul frequencies on Berkeley target
Urukul sync is not reliable at 125/1000
2019-02-05 11:24:45 +08:00
5a7460a38e kasli: add sync delays to device_db_berkeley 2019-02-01 22:14:03 +08:00
ea431b6982 sayma_rtm: use 150MHz RTIO freq for DDMTD 2019-01-31 20:43:44 +08:00
ec230d6560 sayma: move SYSREF DDMTD to the RTM
Put RTM Si5324 into bypass mode before running.
Needs rework to cut RTM Si5324 reset trace.
Needs rework to fix LVDS termination on RTM R310/R313 and R314/R315.
Needs uFL jumper cables between RTM "REF LO DIAG" and "CRD AUX CLKIN" (sic).
2019-01-31 20:39:33 +08:00
8119000982 sayma_rtm_drtio: use Si5324 soft reset
Needs easy board rework to cut trace at pin 1 of Si5324.
The Si5324 contains an internal pull-up on that pin.

Allows using Si5324 + HMC7043 chips at the same time.

Allows the Si5324 bypass hack for DDMTD experiments on the RTM.
2019-01-31 19:43:54 +08:00
82106dcd95 si5324: add bypass function 2019-01-31 19:38:55 +08:00
8bbd4207d8 si5324: use consistent bitmask 2019-01-31 19:35:56 +08:00
d3c608aaec jesd204sync: reset and check lock status of DDMTD helper PLL in firmware 2019-01-31 15:11:16 +08:00
fa3b40141d hmc830_7043: document sayma clock muxes 2019-01-31 15:10:11 +08:00
ec8560911f siphaser: bugfixes
* Fix integer overflow in degree computation
* Add some phase slips after the first transition to get out of the jitter zone and avoid intermittent short windows
2019-01-30 16:56:38 +08:00
c591009220 sayma: report TSC phase of SYSREF (TSC LSBs on SYSREF rising edge) in SYSREF sampler
Better visibility, better diagnostics, allows some changing of SYSREF frequency while keeping the same gateware.
2019-01-29 23:30:01 +08:00
9d0d02a561 jesd204sync: increase tolerance for coarse->final target in calibrate_sysref_target
There is plenty of slack (it only needs to meet timing at the RTIO frequency).
2019-01-29 16:48:55 +08:00
ed6aa29897 jesd204sync: print more information on test_slip_ddmtd error 2019-01-29 16:47:29 +08:00
2e8decbce3 kasli_sawgmaster: generate a HMC830 clock with Urukul 2019-01-29 15:06:45 +08:00
9ae57fd51e sayma: pass rtio_clk_freq to DDMTD core 2019-01-29 15:06:45 +08:00
90c9fa446f test: add array transfer test
200 kB/s, more than a factor of 10 slower than the bare string transfer

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-28 14:30:44 +00:00
7a5d28b73d jesd204sync: test SYSREF period 2019-01-28 19:11:38 +08:00
1a42e23fb4 jesd204sync: print DDMTD SYSREF final alignment delta 2019-01-28 18:39:16 +08:00
eebff6d77f jesd204sync: fix max_phase_deviation 2019-01-28 18:38:18 +08:00
b9e3fab49c jesd204sync: improve messaging 2019-01-28 18:37:46 +08:00
145f08f3fe jesd204sync: update SYSREF S/H limit deviation tolerance
Follows the increased DDMTD resolution.
2019-01-28 18:21:31 +08:00
ba21dc8498 jesd204sync: improve messaging 2019-01-28 18:08:20 +08:00
3acee87df2 firmware: improve DDMTD resolution using dithering/averaging 2019-01-28 16:04:04 +08:00
cfe66549ff jesd204sync: cleanup DDMTD averaging code 2019-01-28 14:14:50 +08:00
2b0d63db23 hmc830_7043: support 125MHz RTIO 2019-01-28 13:44:08 +08:00
bdd4e52a53 ad9154: support 125MHz RTIO 2019-01-28 13:43:52 +08:00
47312e55d3 sayma: set RTIO_FREQUENCY in MasterDAC 2019-01-28 13:43:28 +08:00
443d6d8688 sayma_amc: pass RTIO clock frequency to SiPhaser 2019-01-28 09:49:03 +08:00
3b6f47886e firmware: print more info on DDMTD stability error 2019-01-27 23:06:11 +08:00
74fdd04622 firmware: test DDMTD stability 2019-01-27 20:39:12 +08:00