forked from M-Labs/artiq
wrpll: clarify comment
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@ -267,7 +267,8 @@ mod si549 {
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fn get_frequencies() -> (u32, u32, u32) {
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unsafe {
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csr::wrpll::frequency_counter_update_en_write(1);
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clock::spin_us(200_000); // wait for at least one update
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// wait for at least one full update cycle (> 2 timer periods)
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clock::spin_us(200_000);
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csr::wrpll::frequency_counter_update_en_write(0);
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let helper = csr::wrpll::frequency_counter_counter_helper_read();
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let main = csr::wrpll::frequency_counter_counter_rtio_read();
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