Commit Graph

233 Commits

Author SHA1 Message Date
3f6021bbb6 Remove redundant parameter in InsRV32IRType constructor 2020-08-12 13:19:13 +08:00
186c8659db Remove redundant parameter in Insn constructor 2020-08-12 13:16:37 +08:00
eb56501727 Update README.md 2020-08-11 17:33:50 +08:00
28ed0c8656 Add AUIPC instruction 2020-08-11 17:32:56 +08:00
35b515e53b Add LUI instruction 2020-08-11 17:30:47 +08:00
371fcc81c1 Add RV32I U-Type Instruction Format 2020-08-11 17:25:57 +08:00
32526017d0 Update README.md 2020-08-11 17:12:27 +08:00
bae0f5e7bc Add JAL instruction 2020-08-11 17:11:40 +08:00
2ab62a6f79 Update README.md 2020-08-11 16:59:02 +08:00
a515938780 Add BGEU instruction 2020-08-11 16:57:34 +08:00
504d6e1984 Add BLTU instruction 2020-08-11 16:55:58 +08:00
c82dcfb570 Add BGE instruction 2020-08-11 16:54:16 +08:00
17816f9464 Add BLT instruction 2020-08-11 16:52:34 +08:00
1cff0134fe Add BNE instruction 2020-08-11 16:49:25 +08:00
6461f455d6 Add BEQ instruction 2020-08-11 16:46:07 +08:00
edadb8da47 Add RV32I SB-Type Instruction Format 2020-08-11 16:37:42 +08:00
507675b59f Update README.md 2020-08-11 14:54:27 +08:00
a78309d997 Add SW instruction 2020-08-11 14:52:59 +08:00
ec86b3a76a Add SH instruction 2020-08-11 14:51:34 +08:00
c368060315 Add SB instruction 2020-08-11 14:50:04 +08:00
0f71c1dad1 Add RV32I S-Type Instruction Format 2020-08-11 14:00:04 +08:00
70c417f920 Update README.md 2020-08-11 10:08:11 +08:00
c938eefe41 Update README.md 2020-08-10 17:37:47 +08:00
31753e3679 Add ANDI instruction 2020-08-10 17:35:43 +08:00
c258d541af Add ORI instruction 2020-08-10 17:34:22 +08:00
4b79b06dba Add XORI instruction 2020-08-10 17:32:55 +08:00
71f8a594a6 Add SLTIU instruction 2020-08-10 17:29:55 +08:00
84f4b75267 Add SLTI instruction 2020-08-10 17:24:50 +08:00
0ae11e12b5 Add ADDI instruction 2020-08-10 17:19:57 +08:00
036f842faa Add RV32I I-Type Instruction (Arithmetic Variation) 2020-08-10 17:12:09 +08:00
d60c712704 Update README.md 2020-08-10 16:47:09 +08:00
42b8e5c245 Add LHU instruction 2020-08-10 16:44:08 +08:00
462e526e71 Add LBU instruction 2020-08-10 16:40:45 +08:00
7b440f0fa9 Add LW instruction 2020-08-10 16:35:37 +08:00
c88cf830fc Add LH instruction 2020-08-10 16:29:42 +08:00
167d654be8 Add LB instruction 2020-08-10 16:26:29 +08:00
bfd8f670c2 Add RV32I I-Type Instruction (Load Variation) 2020-08-10 16:16:30 +08:00
10296cbf3b Update README 2020-08-10 14:14:40 +08:00
1cae183569 Add JALR instruction 2020-08-10 14:13:25 +08:00
e97a86bfbe Add (generic) RV32I I-Type Instruction 2020-08-10 13:32:04 +08:00
ff977c0e50 Update README.md 2020-08-10 12:59:00 +08:00
475c1d9fc2 Add SRAI instruction 2020-08-10 12:56:19 +08:00
20a500157b Add attribution to SO in InsnSra.py 2020-08-10 12:46:09 +08:00
9740470c47 Add SRLI instruction 2020-08-10 12:35:49 +08:00
031f335325 Fix SLLI instruction 2020-08-10 12:31:20 +08:00
1fb51e614d Add SLLI instruction 2020-08-10 12:29:52 +08:00
94faa3ba68 Remove redundancy in super() calls 2020-08-10 11:15:05 +08:00
9e64c7ee17 Add RV32I I-Type Instruction (Shift Variation) 2020-08-07 16:39:14 +08:00
1c0541cd12 Document RV32I R-Type Instructions 2020-08-07 16:06:15 +08:00
9bfd155b44 Add AND instruction 2020-08-07 15:57:19 +08:00