fe6a5c42df
rtio: remove unused clk_freq argument
2015-07-27 10:57:15 +08:00
5b50f5fe05
rtio/ttl_serdes_7series: use recommended OSERDES T configuration
2015-07-27 10:50:50 +08:00
f68d5cbd73
rtio: forward rtio domain reset to rio and rio_phy domains
2015-07-27 01:52:47 +08:00
940aa815dd
rtio/ttl_serdes: cleanup/rewrite
2015-07-27 01:44:52 +08:00
Yann Sionneau
d90dff4ef1
rtio: add SERDES TTL (WIP)
2015-07-26 17:40:34 +08:00
47191eda91
dds monitor: relax timing (for pipistrello)
2015-07-19 21:36:51 -06:00
66940ea815
rtio: disable NOP suppression after reset and underflow
2015-07-15 20:54:55 +02:00
34aacd3c5f
complete AD9914 support (no programmable modulus, untested)
2015-07-08 17:22:43 +02:00
8a33d8c868
never stop RTIO counter
2015-07-07 15:29:38 +02:00
58c0150822
ttl: improve clockgen doc
2015-07-05 19:07:13 +02:00
753d61b38f
complete support for TTL clock generator
2015-07-04 18:36:01 +02:00
2881d5f00a
gateware: add RTIO clock generator
2015-07-02 18:20:26 +02:00
23eee94458
pipistrello: add notes to nist_qc1 about dds_clock
...
* remove xtrig from the target as it is not usually connected (used for
dds_clock) and ignore PMT2/BTN2 as C:15 is used for dds_clock.
* this also aligns the ttl channel numbers with kc705/nist_qc1 (two pmt
inputs followed by 16 ttl outputs followed by leds)
2015-06-28 20:56:12 -06:00
944bfafefa
soc: support QC2 and AD9914 (untested)
2015-06-28 21:37:27 +02:00
Yann Sionneau
9c96ebf7d4
nist_qc2: add fmc adapter io file
2015-06-25 03:06:15 +02:00
45ec5dbe84
ad9858: make wb data 8 bit wide
...
matches actual dds bus data width and saves bram
2015-06-20 23:53:01 -06:00
f47c2e54e1
DDS monitor fixes
2015-06-19 17:36:46 -06:00
5a9bdb2e33
DDS monitoring
2015-06-19 15:30:17 -06:00
Florent Kermarrec
38a0f63bd2
gateware/soc: use Minicon SDRAM controller and 128KB shared L2 cache
2015-06-18 12:18:03 +02:00
b2af0f6cc3
soc,runtime: support TTL override
2015-06-09 19:51:02 +08:00
a2ae5e4706
runtime: report TTL status over UDP
2015-06-03 18:26:19 +08:00
b81151eb42
soc: rtio monitor
2015-06-02 17:41:40 +08:00
cbb5027343
gateware/ad9858: use WaitTimer from Migen
2015-05-14 00:16:15 +08:00
a36c51eb83
DDS over RTIO (batch mode not supported yet)
2015-05-08 14:44:39 +08:00
a91bb48ced
gateware: adapt to misoc changes
2015-05-06 18:02:15 +08:00
9072647bdc
ad9858: make read timing configurable, increase read delays
2015-05-05 19:33:34 +08:00
cb65b1e322
rtio/phy/ttl_simple: reset sensitivity with RTIO logic
2015-05-02 16:17:31 +08:00
a61d701d47
rtio: decouple PHY reset from logic reset
2015-05-02 11:47:11 +08:00
62669f9ff2
soc: factor timer, kernel CPU and mailbox
2015-05-01 18:51:24 +08:00
9ecbb4c88d
gateware/amp/mailbox: simplify
2015-04-29 12:56:21 +08:00
27d94a22de
rtio: expose full_ts_width instead of counter_width parameter
2015-04-28 01:38:11 +08:00
e4251c7f41
runtime: get lwip to run
2015-04-22 15:01:32 +08:00
546996f896
coredevice,runtime: put ref_period into the ddb
2015-04-16 15:15:38 +08:00
71167b8adf
rtio: do not attempt latency compensation in gateware
2015-04-16 13:09:29 +08:00
6215d63491
rtio: do not create spurious CSRs when data_width/address_width is 0
2015-04-16 13:04:19 +08:00
26003781b4
rtio/rtlink: add 'like' methods to clone interfaces
2015-04-16 13:02:39 +08:00
30dffb6644
rtio/phy: add wishbone adapter
2015-04-15 20:39:40 +08:00
4c10182c9f
rtio: refactor, use rtlink
2015-04-14 19:44:45 +08:00
ff9a7727d2
rtio: add rtlink definition (currently unused)
2015-04-13 22:19:18 +08:00
7e591bb1c7
targets: use _Peripherals/UP/AMP class names, share QC1 IO defs
2015-04-07 00:07:53 +08:00
1ed60e0829
gateware/amp: use new ModuleTransformer API
2015-04-06 23:54:53 +08:00
c6d3750076
runtime,amp: set kernel memory start to SDRAM+128K, use custom linker file to split memory
2015-04-03 16:03:38 +08:00
Florent Kermarrec
2995f0a705
remove use of _r prefix on CSRs
2015-04-02 18:30:44 +08:00
5bd8d414cf
gateware/amp: add kernel CPU and mailbox modules
2015-04-02 16:49:36 +08:00
3122623c6f
rtio: make 63-bit timestamp counter the default [soc]
2015-03-12 13:13:35 +01:00
28bce9ee40
artiqlib -> artiq.gateware
2015-03-08 11:00:24 +01:00
