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Commit Graph

96 Commits

Author SHA1 Message Date
68891493a3 analyzer: move common to artiq.protocols
migen was still pulled in through rtio.__init__.py
2016-01-29 20:26:48 -07:00
d1119d7747 artiq_dir: move out of tools to unlink dependencies 2016-01-25 18:15:50 -07:00
cbb60337ae refactor Analyzer constants to unlink dependencies 2016-01-25 18:03:48 -07:00
2832d200f2 Merge remote-tracking branch 'm-labs/master' into ppp2
* m-labs/master:
  test/worker: update
  gui/log: display level and date information in tooltips
  master: add filename in worker log entries. Closes #226
  master: finer control of worker exception reporting. Closes #233
  conda: add artiq-kc705-nist_clock
  gateware: add QC1 docstring
  gateware: add clock target from David
  gateware: clean up and integrate QC2 modifications from Daniel
  add information about CLOCK hardware
2016-01-25 12:17:04 -07:00
8cbb60b370 Merge branch 'master' into ppp2
* master:
  add release notes/process
  targets/kc705: fix e664fe3
  targets/kc705: fix DDS_RTIO_CLK_RATIO for AD9914. Closes #238
  transforms.inferencer: give a suggestion on "raise Exception".
  pdq2/mediator: raise instances, not classes
  pdq2: wire up more of the pipeline
  doc: use actual version
  Fix formatting.
  doc: add artiq_flash
  versioneer: remote tag_prefix = v
2016-01-20 19:29:00 -07:00
18f0ee814d gateware: add QC1 docstring 2016-01-20 21:27:22 -05:00
db8ba8d6c1 gateware: add clock target from David 2016-01-20 21:23:49 -05:00
b3ba97e431 gateware: clean up and integrate QC2 modifications from Daniel 2016-01-20 21:17:19 -05:00
fa1afb7dd8 add information about CLOCK hardware 2016-01-20 21:06:02 -05:00
cb5fd08713 targets/kc705: fix e664fe3 2016-01-20 09:38:44 -05:00
e664fe38b0 targets/kc705: fix DDS_RTIO_CLK_RATIO for AD9914. Closes #238 2016-01-20 09:18:50 -05:00
57ce78c54d pipistrello: add rtio.Analyzer() 2016-01-18 19:17:44 -07:00
whitequark
9366a29483 Implement core device storage (fixes #219). 2016-01-10 13:04:55 +00:00
whitequark
577108554f Move kernel CPU address space up to 0x40800000. 2016-01-07 18:26:11 +00:00
87dd09a71c gateware: compress bitstreams 2016-01-06 15:40:28 -07:00
04b0db1a91 targets/kc705: pre-divide input RTIO clock to improve non-50% duty cycle tolerance 2015-12-29 17:00:57 +08:00
ba6c527819 gateware/targets: add RTIO log channels 2015-12-26 22:44:01 +08:00
080752092c gateware/rtio: add LogChannel 2015-12-26 22:43:28 +08:00
9ba8dfbf23 gateware/rtio/core: avoid potential python bug 2015-12-26 22:11:57 +08:00
8691f69a3c gateware/rtio/analyzer: suppress spurious initial reset messages 2015-12-21 18:32:08 +08:00
5769107936 gateware/rtio: keep counter clock domain transfer active during CSR reset 2015-12-20 22:12:34 +08:00
46f59b673f coredevice: analyzer message decoding 2015-12-20 14:34:16 +08:00
1638f0fa9b gateware/rtio/analyzer: fix event ordering 2015-12-19 17:04:30 +08:00
64ad38854b gateware/rtio/analyzer: fix exception message layout 2015-12-18 18:27:06 +08:00
59a3ea4f15 gateware/rtio/analyzer: fix bus write 2015-12-18 15:44:20 +08:00
4def561710 targets: integrate RTIO analyzer 2015-12-16 17:36:52 +08:00
afaad270cc rtio/analyzer: fix superficial mistakes 2015-12-16 17:36:36 +08:00
33860820b9 gateware/soc: use new SDRAM API call 2015-12-16 14:59:35 +08:00
bf29e8ddc6 kc705: make config[] usage consistent 2015-12-15 12:14:30 -07:00
4362f97d67 gateware/rtio/analyzer: complete, untested 2015-12-14 23:53:14 +08:00
b5f2e178f6 rtio/analyzer: message encoder 2015-12-14 00:37:08 +08:00
7886827b80 CSRConstant: also port DDS constants 2015-12-04 18:27:59 +08:00
5db1f9794e top.add_constant() -> top.config[] (CSRConstant)
This is to be synchronized with the corresponding change in misoc.
2015-12-04 18:27:54 +08:00
whitequark
c14299dca8 Merge branch 'new-py2llvm' 2015-11-24 03:01:54 +08:00
whitequark
9fc7a42036 pipistrello: expose LED{1..4} as RTIO channels. 2015-11-23 18:26:45 +08:00
ae99af27ee runtime,gateware: use new misoc identifier 2015-11-10 22:44:38 +08:00
e749bae302 package everything to rebuild core device binaries 2015-11-09 10:47:14 +08:00
whitequark
51f04f6311 Explicitly use the python3.5 binary everywhere. 2015-11-07 13:39:39 +03:00
ad5a32fb6e targets/kc705: remove unneeded argument on qc2 2015-11-04 20:09:37 +08:00
e26147b2ac gateware,runtime: use new migen/misoc 2015-11-04 00:35:03 +08:00
e46ba83513 rtio/dds: use rio_phy domain to reset FTW tracker. Closes #120 2015-10-04 22:53:51 +08:00
01416bb0be copyright: claim contributions
These are contributions of >= 30% or >= 20 lines (half-automated).

I hereby resubmit all my previous contributions to the ARTIQ project
under the following terms:

    This program is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.

Closes #130

Signed-off-by: Robert Jordens <jordens@gmail.com>
2015-09-06 16:08:57 -06:00
90ce54d8d5 gateware/dds/monitor: support onehot selection, strip reset 2015-08-27 15:54:01 +08:00
d38f1e6796 ad9xxx: fix gpio signal length 2015-08-22 13:12:30 +08:00
094fc1cfd1 qc2: DDS selection is active low 2015-08-22 11:49:38 +08:00
1d34c06d79 rtio: detect collision errors 2015-07-29 19:43:35 +08:00
fb339d294e serdes_s6: no need to reset 2015-07-28 12:54:31 -06:00
9ac5bc52d4 rtio: add spartan6 serdes, 4x and 8x 2015-07-27 21:01:15 -06:00
b1d58bd4c8 rtio: fix replace/sequence_error when fine_ts_width > 0 2015-07-27 12:22:35 +08:00
959b7a7b46 rtio: resetless -> reset_less 2015-07-27 11:46:56 +08:00