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3663 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 0c1a76d668 unify rtio/drtio kernel interface 2016-11-01 00:30:16 +08:00
Sebastien Bourdeauducq 07ad00c1ca drtio: split kernel/system CSRs 2016-10-31 18:09:36 +08:00
Sebastien Bourdeauducq 9aa94e1a2d adapt to migen/misoc changes 2016-10-31 00:53:01 +08:00
Sebastien Bourdeauducq da5208e160 drtio: add master gateware target 2016-10-29 17:31:15 +08:00
Sebastien Bourdeauducq 7c05dccf65 drtio: add support for 125MHz clock on GTX_1000BASE_BX10 2016-10-29 17:30:29 +08:00
Sebastien Bourdeauducq 95def81c03 drtio: squelch frame signals until link layer ready 2016-10-29 17:05:30 +08:00
Sebastien Bourdeauducq 4f6241283c drtio: always use NoRetiming on MultiReg inputs 2016-10-29 16:37:53 +08:00
Sebastien Bourdeauducq 9bbc6eb0ef drtio: more full stack testing 2016-10-26 22:04:32 +08:00
Sebastien Bourdeauducq 929a7650a8 drtio: fixes 2016-10-26 22:03:44 +08:00
Sebastien Bourdeauducq 45621934fd drtio: forward errors to CSR 2016-10-26 22:03:05 +08:00
Sebastien Bourdeauducq 7f8e53aa5c drtio: more fixes and tests 2016-10-26 11:48:47 +08:00
Sebastien Bourdeauducq 22173b8c70 drtio: full stack unittest 2016-10-26 00:35:22 +08:00
Sebastien Bourdeauducq f763b519f4 drtio: fix channel selection 2016-10-26 00:33:21 +08:00
Sebastien Bourdeauducq ad042de954 drtio: fixes, basic TTL working in simulation 2016-10-25 12:41:16 +08:00
Sebastien Bourdeauducq 94e68dbae4 drtio: test_full_stack (WIP) 2016-10-24 23:36:33 +08:00
Sebastien Bourdeauducq a4e85081aa drtio: more simple fixes 2016-10-24 23:32:49 +08:00
Sebastien Bourdeauducq 029e0d95b7 drtio: simple fixes 2016-10-24 23:10:15 +08:00
Sebastien Bourdeauducq c39987b617 drtio: handle underflow/sequence error CSRs 2016-10-24 20:46:55 +08:00
Sebastien Bourdeauducq 7dd6eb2f5e drtio: add RT write controller 2016-10-24 19:50:13 +08:00
Sebastien Bourdeauducq 83bec06226 drtio: fifo level -> fifo space 2016-10-24 15:59:12 +08:00
Sebastien Bourdeauducq aa8e211735 drtio/rt_packets: fix 2016-10-22 13:03:35 +08:00
Sebastien Bourdeauducq 449d1c4dc6 rtio: export CDC modules 2016-10-22 13:03:10 +08:00
Sebastien Bourdeauducq 67c19ab178 drtio: RTPacketMaster RX, untested 2016-10-22 01:04:14 +08:00
Sebastien Bourdeauducq 3b4a40401a drtio: RTPacketMaster TX (WIP) 2016-10-21 22:46:14 +08:00
Sebastien Bourdeauducq 1e313afe64 drtio: CrossDomainNotification 2016-10-21 22:45:45 +08:00
Sebastien Bourdeauducq c71c4c89e0 drtio: change data direction in _CrossDomainRequest 2016-10-21 22:44:47 +08:00
Sebastien Bourdeauducq 6a88229e6a drtio: CrossDomainRequest 2016-10-20 23:37:59 +08:00
Sebastien Bourdeauducq 9790c5d9ed drtio/iot: FIFO level 2016-10-19 18:04:03 +08:00
Sebastien Bourdeauducq 71480c4d15 drtio: fix mmcm_mult 2016-10-18 17:28:03 +08:00
Sebastien Bourdeauducq e7dbed3b02 gateware: KC705 satellite target 2016-10-17 19:23:45 +08:00
Sebastien Bourdeauducq 9752ffe3d1 drtio: various fixes 2016-10-17 19:23:08 +08:00
Sebastien Bourdeauducq cce29e8b83 gateware/spi: fix import 2016-10-17 14:47:19 +08:00
Sebastien Bourdeauducq d3b274fc4d drtio: synchronizer MMCM 2016-10-16 17:40:58 +08:00
Sebastien Bourdeauducq 03d3a85e75 drtio: RX clock alignment and ready 2016-10-15 18:36:27 +08:00
Sebastien Bourdeauducq 08e4aa3e3f drtio: GTX WIP 2016-10-14 00:36:13 +08:00
Sebastien Bourdeauducq c548a65ec3 drtio: clock domains 2016-10-14 00:34:59 +08:00
Sebastien Bourdeauducq 018f6d1b52 drtio: implement basic IOT 2016-10-11 17:59:22 +08:00
Sebastien Bourdeauducq a40b39e9a2 drtio: structure 2016-10-10 23:12:12 +08:00
Sebastien Bourdeauducq 87ec333f55 drtio: implement basic writes, errors, fifo levels on satellite 2016-10-10 00:13:41 +08:00
Sebastien Bourdeauducq 23b3302200 drtio: implement TSC load in satellite 2016-10-07 19:30:53 +08:00
Sebastien Bourdeauducq 43caffc168 drtio: self-checking echo test 2016-10-07 17:31:51 +08:00
Sebastien Bourdeauducq 0574e882d2 drtio: basic RT packet echo test 2016-10-07 15:36:32 +08:00
Sebastien Bourdeauducq cb0d1549c6 drtio: add rt_packets TX datapath, fixes 2016-10-07 15:35:29 +08:00
Sebastien Bourdeauducq 76bac21d14 drtio: RT RX datapath, untested 2016-10-06 18:51:20 +08:00
Sebastien Bourdeauducq 1e0c6d6d5d drtio: monitor received link_init 2016-09-30 11:25:06 +08:00
Sebastien Bourdeauducq cefb9e1405 drtio: add full link layer 2016-09-27 21:41:57 +08:00
Sebastien Bourdeauducq 08772f7a71 drtio: add RX ready signaling 2016-09-27 19:02:54 +08:00
Sebastien Bourdeauducq 95d7cba34a drtio: fixes, add aux packet test 2016-09-27 12:46:01 +08:00
Sebastien Bourdeauducq e59142e344 drtio: use additive scrambler reset by link init 2016-09-27 11:38:05 +08:00
Sebastien Bourdeauducq 8a92c2c7e5 drtio: add RX link layer, fixes, simple loopback demo 2016-09-27 11:23:29 +08:00