I haven't done any runtime tests using Pounder, but it seems
like the API change is just a consequence of making the QSPI
address width runtime-configurable.
* origin/master:
update cargosha256
build(deps): bump log from 0.4.13 to 0.4.14
build(deps): bump cortex-m-log from 0.6.2 to 0.7.0
build(deps): bump serde from 1.0.120 to 1.0.123
131: build(deps): bump mcp23017 from `a3d0727` to `61933f8` r=jordens a=dependabot[bot]
Bumps [mcp23017](https://github.com/mrd0ll4r/mcp23017) from `a3d0727` to `61933f8`.
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<li><a href="61933f857a"><code>61933f8</code></a> fix miscalculation in read_gpioab due to missing parentheses</li>
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130: build(deps): bump serde from 1.0.114 to 1.0.115 r=jordens a=dependabot[bot]
Bumps [serde](https://github.com/serde-rs/serde) from 1.0.114 to 1.0.115.
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128: build(deps): bump cortex-m from 0.6.2 to 0.6.3 r=jordens a=dependabot[bot]
Bumps [cortex-m](https://github.com/rust-embedded/cortex-m) from 0.6.2 to 0.6.3.
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<h2>v0.6.3</h2>
<h3>Added</h3>
<ul>
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<li><code>UDF</code> intrinsic</li>
<li>Methods to enable/disable exceptions in SCB</li>
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<h3>Fixed</h3>
<ul>
<li>Fix bug in <code>asm::delay</code> not updating status clobber flags</li>
<li>Swapped to <code>llvm_asm!</code> to support inline assembly on new nightlies</li>
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<h3>Added</h3>
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<li>Initial Cortex-M Security Extension support for armv8m</li>
<li><code>UDF</code> intrinsic</li>
<li>Methods to enable/disable exceptions in SCB</li>
</ul>
<h3>Fixed</h3>
<ul>
<li>Fix bug in <code>asm::delay</code> not updating status clobber flags</li>
<li>Swapped to <code>llvm_asm!</code> to support inline assembly on new nightlies</li>
<li>Our precompiled assembly routines have additional debug information</li>
<li>ITM <code>is_fifo_ready</code> improved to support armv8</li>
<li>Cache enabling moved to pre-built assembly routines to prevent possible
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<li><a href="2e44cd8071"><code>2e44cd8</code></a> Bump version to 0.6.3</li>
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<li><a href="b607b35faf"><code>b607b35</code></a> Use assembly sequences to enable caches.</li>
<li><a href="33f031868d"><code>33f0318</code></a> Correct the documentation for the <code>SCB::set_pendst</code> function</li>
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129: build(deps): bump cortex-m-log from 0.6.1 to 0.6.2 r=jordens a=dependabot[bot]
Bumps [cortex-m-log](https://github.com/DoumanAsh/cortex-m-log) from 0.6.1 to 0.6.2.
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119: build(deps): bump embedded-hal from 0.2.3 to 0.2.4 r=jordens a=dependabot[bot]
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Bumps [embedded-hal](https://github.com/japaric/embedded-hal) from 0.2.3 to 0.2.4.
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<h2>[Unreleased]</h2>
<h2>[v1.0.0-alpha.1] - 2020-06-16</h2>
<p>*** This is an alpha release with breaking changes (sorry) ***</p>
<h3>Added</h3>
<ul>
<li>A nonblocking trait for interfacing with random number generation hardware.</li>
</ul>
<h3>Changed</h3>
<ul>
<li>All traits have been marked as proven (<code>unproven</code> feature has been removed).</li>
<li>All trait methods have been made fallible.</li>
<li>All trait methods have been renamed <code>try_*</code> (i.e. <code>try_send</code>) for consistency.</li>
<li>The <code>Capture</code>, <code>Pwm</code>, <code>PwmPin</code> and <code>Qei</code> traits have been moved into their own
<code>capture</code>, <code>pwm</code> and <code>qei</code> modules for consistency.</li>
<li>Void has been replaced with <code>core::convert::Infallible</code> which should be used
in trait implementations where methods cannot fail.</li>
<li>A new <a href="https://github.com/rust-embedded/embedded-hal#how-to-add-a-new-trait">process</a>
has been adopted for the addition of traits to the embedded-hal.</li>
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125: build(deps): bump nb from 0.1.2 to 1.0.0 r=jordens a=dependabot[bot]
Bumps [nb](https://github.com/rust-embedded/nb) from 0.1.2 to 1.0.0.
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120: build(deps): bump serde from 1.0.112 to 1.0.114 r=jordens a=dependabot[bot]
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Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>
Ryan Summers
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Robert Jördens
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