Updating to new HAL

master
Ryan Summers 2020-10-26 16:58:29 +01:00
parent dac6f73d5e
commit 17c8e4d2e1
3 changed files with 121 additions and 90 deletions

131
Cargo.lock generated
View File

@ -10,21 +10,22 @@ dependencies = [
[[package]]
name = "aligned"
version = "0.3.2"
version = "0.3.4"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "eb1ce8b3382016136ab1d31a1b5ce807144f8b7eb2d5f16b2108f0f07edceb94"
checksum = "c19796bd8d477f1a9d4ac2465b464a8b1359474f06a96bb3cda650b4fca309bf"
dependencies = [
"as-slice",
]
[[package]]
name = "as-slice"
version = "0.1.3"
version = "0.1.4"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "37dfb65bc03b2bc85ee827004f14a6817e04160e3b1a28931986a666a9290e70"
checksum = "bb4d1c23475b74e3672afa8c2be22040b8b7783ad9b461021144ed10a46bb0e6"
dependencies = [
"generic-array 0.12.3",
"generic-array 0.13.2",
"generic-array 0.14.4",
"stable_deref_trait",
]
@ -41,9 +42,9 @@ dependencies = [
[[package]]
name = "autocfg"
version = "1.0.0"
version = "1.0.1"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "f8aac770f1885fd7e387acedd76065302551364496e46b3dd00860b2f8359b9d"
checksum = "cdb031dd78e28731d87d56cc8ffef4a8f36ca26c38fe2de700543e627f8a464a"
[[package]]
name = "bare-metal"
@ -55,10 +56,16 @@ dependencies = [
]
[[package]]
name = "bit_field"
version = "0.10.0"
name = "bare-metal"
version = "1.0.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "a165d606cf084741d4ac3a28fb6e9b1eb0bd31f6cd999098cfddb0b2ab381dc0"
checksum = "f8fe8f5a8a398345e52358e18ff07cc17a568fbca5c6f73873d3a62056309603"
[[package]]
name = "bit_field"
version = "0.10.1"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "dcb6dd1c2376d2e096796e234a70e17e94cc2d5d54ff8ce42b28cef1d0d359a4"
[[package]]
name = "bitfield"
@ -106,7 +113,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "2be99930c99669a74d986f7fd2162085498b322e6daae8ef63a97cc9ac1dc73c"
dependencies = [
"aligned",
"bare-metal",
"bare-metal 0.2.5",
"bitfield",
"volatile-register",
]
@ -184,7 +191,7 @@ version = "0.2.4"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "fa998ce59ec9765d15216393af37a58961ddcefb14c753b4816ba2191d865fcb"
dependencies = [
"nb 0.1.2",
"nb 0.1.3",
"void",
]
@ -226,6 +233,16 @@ dependencies = [
"typenum",
]
[[package]]
name = "generic-array"
version = "0.14.4"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "501466ecc8a30d1d3b7fc9229b122b2ce8ed6e9d9223f1138d4babb253e51817"
dependencies = [
"typenum",
"version_check",
]
[[package]]
name = "hash32"
version = "0.1.1"
@ -236,10 +253,16 @@ dependencies = [
]
[[package]]
name = "heapless"
version = "0.5.5"
name = "hashbrown"
version = "0.9.1"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "73a8a2391a3bc70b31f60e7a90daa5755a360559c0b6b9c5cfc0fee482362dc0"
checksum = "d7afe4a420e3fe79967a00898cc1f4db7c8a49a9333a29f8a4bd76a253d5cd04"
[[package]]
name = "heapless"
version = "0.5.6"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "74911a68a1658cfcfb61bc0ccfbd536e3b6e906f8c2f7883ee50157e3e2184f1"
dependencies = [
"as-slice",
"generic-array 0.13.2",
@ -250,11 +273,12 @@ dependencies = [
[[package]]
name = "indexmap"
version = "1.4.0"
version = "1.6.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "c398b2b113b55809ceb9ee3e753fcbac793f1956663f3c36549c1346015c2afe"
checksum = "55e2e4c765aa53a0424761bf9f41aa7a6ac1efa87238f59560640e27fca028f2"
dependencies = [
"autocfg",
"hashbrown",
]
[[package]]
@ -282,9 +306,12 @@ dependencies = [
[[package]]
name = "nb"
version = "0.1.2"
version = "0.1.3"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "b1411551beb3c11dedfb0a90a0fa256b47d28b9ec2cdff34c25a2fa59e45dbdc"
checksum = "801d31da0513b6ec5214e9bf433a77966320625a37860f910be265be6e18d06f"
dependencies = [
"nb 1.0.0",
]
[[package]]
name = "nb"
@ -300,9 +327,9 @@ checksum = "de96540e0ebde571dc55c73d60ef407c653844e6f9a1e2fdbd40c07b9252d812"
[[package]]
name = "panic-semihosting"
version = "0.5.3"
version = "0.5.4"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "c03864ac862876c16a308f5286f4aa217f1a69ac45df87ad3cd2847f818a642c"
checksum = "aed16eb761d0ee9161dd1319cb38c8007813b20f9720a5a682b283e7b8cdfe58"
dependencies = [
"cortex-m",
"cortex-m-semihosting",
@ -318,6 +345,12 @@ dependencies = [
"proc-macro-hack",
]
[[package]]
name = "paste"
version = "1.0.2"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "ba7ae1a2180ed02ddfdb5ab70c70d596a26dd642e097bb6fe78b1bde8588ed97"
[[package]]
name = "paste-impl"
version = "0.1.18"
@ -329,15 +362,15 @@ dependencies = [
[[package]]
name = "proc-macro-hack"
version = "0.5.16"
version = "0.5.18"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "7e0456befd48169b9f13ef0f0ad46d492cf9d2dbb918bcf38e01eed4ce3ec5e4"
checksum = "99c605b9a0adc77b7211c6b1f722dcb613d68d66859a44f3d485a6da332b0598"
[[package]]
name = "proc-macro2"
version = "1.0.18"
version = "1.0.24"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "beae6331a816b1f65d04c45b078fd8e6c93e8071771f41b8163255bbd8d7c8fa"
checksum = "1e0704ee1a7e00d7bb417d0770ea303c1bccbabf0ef1667dae92b5967f5f8a71"
dependencies = [
"unicode-xid",
]
@ -400,9 +433,9 @@ checksum = "388a1df253eca08550bef6c72392cfe7c30914bf41df5269b68cbd6ff8f570a3"
[[package]]
name = "serde"
version = "1.0.115"
version = "1.0.117"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "e54c9a88f2da7238af84b5101443f0c0d0a3bbdc455e34a5c9497b1903ed55d5"
checksum = "b88fa983de7720629c9387e9f517353ed404164b1e482c970a90c1a4aaf7dc1a"
dependencies = [
"serde_derive",
]
@ -419,9 +452,9 @@ dependencies = [
[[package]]
name = "serde_derive"
version = "1.0.115"
version = "1.0.117"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "609feed1d0a73cc36a0182a840a9b37b4a82f0b1150369f0536a9e3f2a31dc48"
checksum = "cbd1ae72adb44aab48f325a02444a5fc079349a8d804c1fc922aed3f7454c74e"
dependencies = [
"proc-macro2",
"quote",
@ -467,9 +500,9 @@ dependencies = [
[[package]]
name = "stable_deref_trait"
version = "1.1.1"
version = "1.2.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "dba1a27d3efae4351c8051072d619e3ade2820635c3958d826bfea39d59b54c8"
checksum = "a8f112729512f8e442d81f95a8a7ddf2b7c6b8a1a6f509a95864142b30cab2d3"
[[package]]
name = "stm32h7"
@ -477,7 +510,18 @@ version = "0.11.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "e9beb5e2a223c82f263c3051bba4614aebc6e98bd40217df3cd8817c83ac7bd8"
dependencies = [
"bare-metal",
"bare-metal 0.2.5",
"cortex-m",
"vcell",
]
[[package]]
name = "stm32h7"
version = "0.12.1"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "7571f17d1ed7d67957d0004de6c52bd1ef5e736ed5ddc2bcecf001512269f77c"
dependencies = [
"bare-metal 0.2.5",
"cortex-m",
"cortex-m-rt",
"vcell",
@ -500,38 +544,39 @@ version = "0.5.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "987c66628f30012ed9a41cc738421c5caece03292c0cc8fd1e99956f122735bd"
dependencies = [
"bare-metal",
"bare-metal 0.2.5",
"cast",
"cortex-m",
"cortex-m-rt",
"embedded-hal",
"nb 0.1.2",
"paste",
"stm32h7",
"nb 0.1.3",
"paste 0.1.18",
"stm32h7 0.11.0",
"void",
]
[[package]]
name = "stm32h7xx-hal"
version = "0.7.1"
source = "git+https://github.com/stm32-rs/stm32h7xx-hal#f28cf3e66c7a7fe2bdd1518f06acbf680e9b9a11"
dependencies = [
"bare-metal",
"bare-metal 1.0.0",
"cast",
"cortex-m",
"cortex-m-rt",
"embedded-hal",
"nb 0.1.2",
"paste",
"nb 1.0.0",
"paste 1.0.2",
"smoltcp",
"stm32h7",
"stm32h7 0.12.1",
"void",
]
[[package]]
name = "syn"
version = "1.0.33"
version = "1.0.48"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "e8d5d96e8cbb005d6959f119f773bfaebb5684296108fb32600c00cde305b2cd"
checksum = "cc371affeffc477f42a221a1e4297aedcea33d47d19b61455588bd9d8f6b19ac"
dependencies = [
"proc-macro2",
"quote",
@ -546,9 +591,9 @@ checksum = "373c8a200f9e67a0c95e62a4f52fbf80c23b4381c05a17845531982fa99e6b33"
[[package]]
name = "unicode-xid"
version = "0.2.0"
version = "0.2.1"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "826e7639553986605ec5979c7dd957c7895e93eabed50ab2ffa7f6128a75097c"
checksum = "f7fe0bb3479651439c9112f72b6c505038574c9fbb575ed1bf3b797fa39dd564"
[[package]]
name = "vcell"

View File

@ -59,7 +59,8 @@ features = ["stm32h743v"]
[dependencies.stm32h7xx-hal]
features = ["stm32h743v", "rt", "unproven", "ethernet", "phy_lan8742a", "quadspi"]
path = "../stm32h7xx-hal"
git = "https://github.com/stm32-rs/stm32h7xx-hal"
# path = "../stm32h7xx-hal"
[features]
semihosting = ["panic-semihosting", "cortex-m-log/semihosting"]

View File

@ -36,7 +36,10 @@ use stm32h7xx_hal::prelude::*;
use embedded_hal::digital::v2::{InputPin, OutputPin};
use smoltcp as net;
use hal::ethernet as ethernet;
use hal::{
ethernet,
dma::{DmaExt, DmaChannel, DmaInternal},
};
use heapless::{consts::*, String};
@ -253,6 +256,8 @@ const APP: () = {
afe::ProgrammableGainAmplifier::new(a0_pin, a1_pin)
};
let mut dma_channels = dp.DMA1.split();
// Configure the SPI interfaces to the ADCs and DACs.
let adc0_spi = {
let spi_miso = gpiob
@ -272,11 +277,18 @@ const APP: () = {
polarity: hal::spi::Polarity::IdleHigh,
phase: hal::spi::Phase::CaptureOnSecondTransition,
})
.communication_mode(hal::spi::CommunicationMode::Receiver)
.manage_cs()
.transfer_size(1)
.cs_delay(220e-9);
dma_channels.0.set_peripheral_address(&dp.SPI2.cr1 as *const _ as u32, false);
dma_channels.0.set_memory_address(&SPI_START_CODE as *const _ as u32, false);
dma_channels.0.set_direction(hal::dma::Direction::MemoryToPeripherial);
dma_channels.0.set_transfer_length(1);
dma_channels.0.cr().modify(|_, w| w.circ().enabled());
dma_channels.0.dmamux().modify(|_, w|
w.dmareq_id().variant(hal::stm32::dmamux1::ccr::DMAREQ_ID_A::TIM2_UP));
dma_channels.0.start();
let mut spi: hal::spi::Spi<_, _, u16> = dp.SPI2.spi(
(spi_sck, spi_miso, hal::spi::NoMosi),
config,
@ -285,7 +297,7 @@ const APP: () = {
&clocks.clocks,
);
spi.listen(hal::spi::Event::Eot);
spi.listen(hal::spi::Event::Rxp);
spi
};
@ -308,11 +320,18 @@ const APP: () = {
polarity: hal::spi::Polarity::IdleHigh,
phase: hal::spi::Phase::CaptureOnSecondTransition,
})
.communication_mode(hal::spi::CommunicationMode::Receiver)
.manage_cs()
.transfer_size(1)
.cs_delay(220e-9);
dma_channels.1.set_peripheral_address(&dp.SPI3.cr1 as *const _ as u32, false);
dma_channels.1.set_memory_address(&SPI_START_CODE as *const _ as u32, false);
dma_channels.1.set_direction(hal::dma::Direction::MemoryToPeripherial);
dma_channels.1.dmamux().modify(|_, w|
w.dmareq_id().variant(hal::stm32::dmamux1::ccr::DMAREQ_ID_A::TIM2_UP));
dma_channels.1.set_transfer_length(1);
dma_channels.1.cr().modify(|_, w| w.circ().enabled());
dma_channels.1.start();
let mut spi: hal::spi::Spi<_, _, u16> = dp.SPI3.spi(
(spi_sck, spi_miso, hal::spi::NoMosi),
config,
@ -321,7 +340,7 @@ const APP: () = {
&clocks.clocks,
);
spi.listen(hal::spi::Event::Eot);
spi.listen(hal::spi::Event::Rxp);
spi
};
@ -350,9 +369,7 @@ const APP: () = {
polarity: hal::spi::Polarity::IdleHigh,
phase: hal::spi::Phase::CaptureOnSecondTransition,
})
.communication_mode(hal::spi::CommunicationMode::Transmitter)
.manage_cs()
.transfer_size(1)
.swap_mosi_miso();
dp.SPI4.spi(
@ -382,9 +399,7 @@ const APP: () = {
polarity: hal::spi::Polarity::IdleHigh,
phase: hal::spi::Phase::CaptureOnSecondTransition,
})
.communication_mode(hal::spi::CommunicationMode::Transmitter)
.manage_cs()
.transfer_size(1)
.swap_mosi_miso();
dp.SPI5.spi(
@ -646,28 +661,12 @@ const APP: () = {
// Utilize the cycle counter for RTIC scheduling.
cp.DWT.enable_cycle_counter();
let mut dma = hal::dma::Dma::dma(dp.DMA1, dp.DMAMUX1, clocks.peripheral.DMA1);
dma.configure_m2p_stream(
hal::dma::Stream::One,
&SPI_START_CODE as *const _ as u32,
&adc0_spi.spi.cr1 as *const _ as u32,
hal::dma::DMAREQ_ID::TIM2_CH1,
);
dma.configure_m2p_stream(
hal::dma::Stream::Two,
&SPI_START_CODE as *const _ as u32,
&adc1_spi.spi.cr1 as *const _ as u32,
hal::dma::DMAREQ_ID::TIM2_CH2,
);
// Configure timer 2 to trigger conversions for the ADC
let mut timer2 = dp.TIM2.timer(50.khz(), clocks.peripheral.TIM2, &clocks.clocks);
timer2.configure_channel(hal::timer::Channel::One, 0.25);
timer2.configure_channel(hal::timer::Channel::Two, 0.75);
timer2.listen(hal::timer::Event::ChannelOneDma);
timer2.listen(hal::timer::Event::ChannelTwoDma);
let timer2 = dp.TIM2.timer(500.khz(), clocks.peripheral.TIM2, &clocks.clocks);
{
let t2_regs = unsafe { &*hal::stm32::TIM2::ptr() };
t2_regs.dier.modify(|_, w| w.ude().set_bit());
}
init::LateResources {
afe0: afe0,
@ -690,8 +689,6 @@ const APP: () = {
#[task(binds = SPI3, resources = [adc1, dac1, iir_state, iir_ch], priority = 2)]
fn spi3(c: spi3::Context) {
c.resources.adc1.spi.ifcr.write(|w| w.eotc().set_bit());
let output: u16 = {
let a: u16 = c.resources.adc1.read().unwrap();
let x0 = f32::from(a as i16);
@ -700,18 +697,11 @@ const APP: () = {
y0 as i16 as u16 ^ 0x8000
};
c.resources
.dac1
.spi
.ifcr
.write(|w| w.eotc().set_bit().txtfc().set_bit());
c.resources.dac1.send(output).unwrap();
}
#[task(binds = SPI2, resources = [adc0, dac0, iir_state, iir_ch], priority = 2)]
fn spi2(c: spi2::Context) {
c.resources.adc0.spi.ifcr.write(|w| w.eotc().set_bit());
let output: u16 = {
let a: u16 = c.resources.adc0.read().unwrap();
let x0 = f32::from(a as i16);
@ -720,11 +710,6 @@ const APP: () = {
y0 as i16 as u16 ^ 0x8000
};
c.resources
.dac0
.spi
.ifcr
.write(|w| w.eotc().set_bit().txtfc().set_bit());
c.resources.dac0.send(output).unwrap();
}