Updating branch dependencies

Cargo.lock

@@ -517,7 +517,7 @@ dependencies = [
 [[package]]
 name = "stm32h7xx-hal"
 version = "0.8.0"
-source = "git+https://github.com/quartiq/stm32h7xx-hal?branch=feature/dma-buffer-swap/num-transfers#b87614f432a635e904dea2383ff481f3cc002e80"
+source = "git+https://github.com/stm32-rs/stm32h7xx-hal?branch=dma#3da22d4935c8f6e412b99e6662ec11da5265fb88"
 dependencies = [
  "bare-metal 1.0.0",
  "cast",

Cargo.toml

@@ -53,8 +53,8 @@ default-features = false
 
 [dependencies.stm32h7xx-hal]
 features = ["stm32h743v", "rt", "unproven", "ethernet", "quadspi"]
-git = "https://github.com/quartiq/stm32h7xx-hal"
-branch = "feature/dma-buffer-swap/num-transfers"
+git = "https://github.com/stm32-rs/stm32h7xx-hal"
+branch = "dma"
 
 [features]
 semihosting = ["panic-semihosting", "cortex-m-log/semihosting"]

src/main.rs

@@ -859,7 +859,7 @@ const APP: () = {
                 dp.TIM8.timer(1.khz(), ccdr.peripheral.TIM8, &ccdr.clocks);
             let mut timestamp_timer = timers::PounderTimestampTimer::new(tim8);
 
-            // Pounder is configured to generate a 400MHz reference clock, so a 125MHz sync-clock is
+            // Pounder is configured to generate a 500MHz reference clock, so a 125MHz sync-clock is
             // output. As a result, dividing the 125MHz sync-clk provides a 31.25MHz tick rate for
             // the timestamp timer. 31.25MHz corresponds with a 32ns tick rate.
             timestamp_timer.set_external_clock(timers::Prescaler::Div4);